/**
  ******************************************************************************
  * @file    py32f420_ll_epwm.h
  * @author  MCU Application Team
  * @brief   Header file of EPWM LL module.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by Puya under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __PY32F420_LL_EPWM_H
#define __PY32F420_LL_EPWM_H

#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "py32f4xx.h"
#include "EPWM_SFO.h"

/** @addtogroup PY32F420_LL_Driver
  * @{
  */

#if defined (EPWM1) || defined (EPWM2) || defined (EPWM3) || defined (EPWM4) || defined (EPWM5) || defined (EPWM6)

/** @defgroup EPWM_LL EPWM
  * @{
  */

/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup EPWM_LL_Private_Variables EPWM Private Variables
  * @{
  */
static const uint8_t OFFSET_TAB_CMPCTLx[] =
{
  0x00U,   /* 0: EPWMA */
  0x00U,   /* 1: EPWMB */
  0x02U,   /* 2: EPWMC */
  0x02U,   /* 3: EPWMD */
};

static const uint8_t OFFSET_TAB_AQCTLx[] =
{
  0x00U,   /* 0: EPWMA  */
  0x04U,   /* 1: EPWMB  */
};

static const uint8_t OFFSET_TAB_DCxCTL[] =
{
  0x00U,   /* 0: EPWMA  */
  0x02U,   /* 1: EPWMB  */
};

static const uint8_t OFFSET_TAB_DCxTRIPSEL[] =
{
  0x00U,   /* 0: DCAHTRIPSEL */
  0x02U,   /* 1: DCALTRIPSEL */
  0x04U,   /* 2: DCBHTRIPSEL */
  0x06U,   /* 3: DCBLTRIPSEL */
};

static const uint8_t OFFSET_TAB_SYNCSEL[] =
{
  0x00U,   /* 0: EPWM1 */
  0x00U,   /* 1: EPWM2 */
  0x00U,   /* 2: EPWM3 */
  0x00U,   /* 3: EPWM4 */
  0x04U,   /* 4: EPWM5 */
  0x04U,   /* 5: EPWM6 */
};

static const uint8_t OFFSET_TAB_SYNCSELx[] =
{
  0x00U,   /* 0: SYNCISEL1 */
  0x08U,   /* 1: SYNCISEL2 */
  0x10U,   /* 2: SYNCISEL3 */
  0x18U,   /* 3: SYNCISEL4 */
  0x00U,   /* 4: SYNCISEL5 */
  0x08U,   /* 5: SYNCISEL6 */
};

static const uint8_t OFFSET_TAB_HXBxMUX[] =
{
  0x00U,   /* 0: HXB4_MUX */
  0x04U,   /* 1: HXB5_MUX */
  0x08U,   /* 2: HXB7_MUX */
  0x0CU,   /* 3: HXB8_MUX */
  0x10U,   /* 4: HXB9_MUX */
  0x14U,   /* 5: HXB10_MUX */
  0x18U,   /* 6: HXB11_MUX */
  0x1CU,   /* 7: HXB12_MUX */
};

static const uint8_t OFFSET_TAB_HXBx[] =
{
  0x00U,   /* 0: HXB4 */
  0x08U,   /* 1: HXB5 */
  0x10U,   /* 2: HXB7 */
  0x18U,   /* 3: HXB8 */
  0x20U,   /* 4: HXB9 */
  0x28U,   /* 5: HXB10 */
  0x30U,   /* 6: HXB11 */
  0x38U,   /* 7: HXB12 */
};

static const uint8_t OFFSET_TAB_IXBx[] =
{
  0x00U,   /* 0: IXBSEL1_2   */
  0x04U,   /* 1: IXBSEL3_4   */
  0x08U,   /* 2: IXBSEL5_6   */
  0x0CU,   /* 3: IXBSEL7_8   */
  0x10U,   /* 4: IXBSEL9_10  */
  0x14U,   /* 5: IXBSEL11_12 */
  0x18U,   /* 6: IXBSEL13_14 */
};

/**
  * @}
  */

/* Private constants ---------------------------------------------------------*/
/** @defgroup EPWM_LL_Private_Constants EPWM Private Constants
  * @{
  */

/**
  * @}
  */

/* Private macros ------------------------------------------------------------*/
/** @defgroup EPWM_LL_Private_Macros EPWM Private Macros
  * @{
  */

/**
  * @}
  */


/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup EPWM_LL_ES_INIT EPWM Exported Init structure
  * @{
  */

/**
  * @}
  */
#endif /* USE_FULL_LL_DRIVER */

/* Exported constants --------------------------------------------------------*/
/** @defgroup EPWM_LL_Exported_Constants EPWM Exported Constants
  * @{
  */

/** @defgroup EPWM_LL_EC_Emulation_Mode EPWM Emulation Mode
  * @brief Constants defining the emulation mode
  * @{
  */
#define LL_EPWM_EMULATION_STOP_AFTER_NEXT_TB    0x00000000U               /*!< Stop after next Time Base counter increment or decrement */
#define LL_EPWM_EMULATION_STOP_AFTER_FULL_CYCLE EPWM_TBCTL_FREE_SOFT_0   /*!< Stop when counter completes whole cycle */
#define LL_EPWM_EMULATION_FREE_RUN              EPWM_TBCTL_FREE_SOFT_1   /*!< Free run */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_Count_Mode EPWM Count Mode
  * @brief Constants defining the count mode
  * @{
  */
#define LL_EPWM_COUNT_MODE_DOWN_AFTER_SYNC    0x00000000U          /*!< Count down after sync event */
#define LL_EPWM_COUNT_MODE_UP_AFTER_SYNC      EPWM_TBCTL_PHSDIR   /*!< Count up after sync event */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_Clock_Divider EPWM Clock Divider
  * @brief Constants defining the clock prescaler
  * @{
  */
#define LL_EPWM_CLOCK_DIVIDER_1    0x00000000U                                                            /*!< Divide clock by 1 */
#define LL_EPWM_CLOCK_DIVIDER_2    (                                              EPWM_TBCTL_CLKDIV_0)   /*!< Divide clock by 2 */
#define LL_EPWM_CLOCK_DIVIDER_4    (                       EPWM_TBCTL_CLKDIV_1                       )   /*!< Divide clock by 4 */
#define LL_EPWM_CLOCK_DIVIDER_8    (                       EPWM_TBCTL_CLKDIV_1 | EPWM_TBCTL_CLKDIV_0)   /*!< Divide clock by 8 */
#define LL_EPWM_CLOCK_DIVIDER_16   (EPWM_TBCTL_CLKDIV_2                                              )   /*!< Divide clock by 16 */
#define LL_EPWM_CLOCK_DIVIDER_32   (EPWM_TBCTL_CLKDIV_2                        | EPWM_TBCTL_CLKDIV_0)   /*!< Divide clock by 32 */
#define LL_EPWM_CLOCK_DIVIDER_64   (EPWM_TBCTL_CLKDIV_2 | EPWM_TBCTL_CLKDIV_1                       )   /*!< Divide clock by 64 */
#define LL_EPWM_CLOCK_DIVIDER_128  (EPWM_TBCTL_CLKDIV_2 | EPWM_TBCTL_CLKDIV_1 | EPWM_TBCTL_CLKDIV_0)   /*!< Divide clock by 128 */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_HSClock_Divider EPWM HSClock Divider
  * @brief Constants defining the high speed prescaler
  * @{
  */
#define LL_EPWM_HSCLOCK_DIVIDER_1   0x00000000U                                                                     /*!< Divide clock by 1 */
#define LL_EPWM_HSCLOCK_DIVIDER_2   (                                                    EPWM_TBCTL_HSPCLKDIV_0)   /*!< Divide clock by 2 */
#define LL_EPWM_HSCLOCK_DIVIDER_4   (                          EPWM_TBCTL_HSPCLKDIV_1                          )   /*!< Divide clock by 4 */
#define LL_EPWM_HSCLOCK_DIVIDER_6   (                          EPWM_TBCTL_HSPCLKDIV_1 | EPWM_TBCTL_HSPCLKDIV_0)   /*!< Divide clock by 6 */
#define LL_EPWM_HSCLOCK_DIVIDER_8   (EPWM_TBCTL_HSPCLKDIV_2                                                    )   /*!< Divide clock by 8 */
#define LL_EPWM_HSCLOCK_DIVIDER_10  (EPWM_TBCTL_HSPCLKDIV_2                           | EPWM_TBCTL_HSPCLKDIV_0)   /*!< Divide clock by 10 */
#define LL_EPWM_HSCLOCK_DIVIDER_12  (EPWM_TBCTL_HSPCLKDIV_2 | EPWM_TBCTL_HSPCLKDIV_1                          )   /*!< Divide clock by 12 */
#define LL_EPWM_HSCLOCK_DIVIDER_14  (EPWM_TBCTL_HSPCLKDIV_2 | EPWM_TBCTL_HSPCLKDIV_1 | EPWM_TBCTL_HSPCLKDIV_0)   /*!< Divide clock by 14 */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SyncOutPulse_Mode EPWM SyncOutPulse Mode
  * @brief Constants defining the Sync Out Pulse  Mode
  * @{
  */
#define LL_EPWM_SYNC_OUT_PULSE_ON_SOFTWARE         0x00000000U                                          /*!< Sync pulse is generated by software */
#define LL_EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN     0x00000000U                                          /*!< Sync pulse is passed from EPWMxSYNCIN */
#define LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO        EPWM_TBCTL_SYNCOSEL_0                               /*!< Sync pulse is generated when time base counter equals zero */
#define LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B   EPWM_TBCTL_SYNCOSEL_1                               /*!< Sync pulse is generated when time base counter equals compare B value */
#define LL_EPWM_SYNC_OUT_PULSE_DISABLED            EPWM_TBCTL_SYNCOSEL                                 /*!< Sync pulse is disabled */
#define LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C   (EPWM_TBCTL_SYNCOSEL | EPWM_TBCTL2_SYNCOSELX_0)    /*!< Sync pulse is generated when time base counter equals compare C value */
#define LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_D   (EPWM_TBCTL_SYNCOSEL | EPWM_TBCTL2_SYNCOSELX_1)    /*!< Sync pulse is generated when time base counter equals compare D value */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_PeriodLoad_Mode EPWM PeriodLoad Mode
  * @brief Constants defining the Period Load Mode
  * @{
  */
#define LL_EPWM_PERIOD_SHADOW_LOAD  0x00000000U          /*!< PWM Period register access is through shadow register */
#define LL_EPWM_PERIOD_DIRECT_LOAD  EPWM_TBCTL_PRDLD    /*!< PWM Period register access is directly */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TimeBaseCount_Mode EPWM Time Base Count Mode
  * @brief Constants defining the Time Base Count Mode
  * @{
  */
#define LL_EPWM_CNTR_MODE_UP            0x00000000U                                        /*!< Up - count mode */
#define LL_EPWM_CNTR_MODE_DOWN          (EPWM_TBCTL_CTRMODE_0)                            /*!< Down - count mode */
#define LL_EPWM_CNTR_MODE_UP_DOWN       (EPWM_TBCTL_CTRMODE_1)                            /*!< Up - down - count mode */
#define LL_EPWM_CNTR_MODE_STOP_FREEZE   (EPWM_TBCTL_CTRMODE_1 | EPWM_TBCTL_CTRMODE_0)    /*!< Stop - Freeze counter */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_PeriodShadowLoad_Mode EPWM Period Shadow Load Mode
  * @brief Constants defining the Period Shadow Load Mode
  * @{
  */
#define LL_EPWM_SHADOW_LOAD_MODE_CNTR_ZERO        0x00000000U                 /*!< Shadow to active load occurs when time base counter reaches 0 */
#define LL_EPWM_SHADOW_LOAD_MODE_CNTR_SYNC        EPWM_TBCTL2_PRDLDSYNC_0    /*!< Shadow to active load occurs when time base counter reaches 0 and a SYNC occurs */
#define LL_EPWM_SHADOW_LOAD_MODE_SYNC             EPWM_TBCTL2_PRDLDSYNC_1    /*!< Shadow to active load occurs only when a SYNC occurs */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TimeBaseCounter_Direction EPWM Time Base Counter Direction
  * @brief Constants defining the direction of the time base counter
  * @{
  */
#define LL_EPWM_TIME_BASE_STATUS_COUNT_DOWN        0x00000000U           /*!< Time base counter is counting down */
#define LL_EPWM_TIME_BASE_STATUS_COUNT_UP          EPWM_TBSTS_CTRDIR    /*!< Time base counter is counting up */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_Current_Link EPWM Current Link
  * @brief Constants defining the Current Link
  * @{
  */
#define LL_EPWM_LINK_WITH_EPWM_1            0x00000000U                                           /*!< link current EPWM with EPWM1 */
#define LL_EPWM_LINK_WITH_EPWM_2            (EPWM_XLINK_TBPRDLINK_0                          )   /*!< link current EPWM with EPWM2 */
#define LL_EPWM_LINK_WITH_EPWM_3            (EPWM_XLINK_TBPRDLINK_1                          )   /*!< link current EPWM with EPWM3 */
#define LL_EPWM_LINK_WITH_EPWM_4            (EPWM_XLINK_TBPRDLINK_1 | EPWM_XLINK_TBPRDLINK_0)   /*!< link current EPWM with EPWM4 */
#define LL_EPWM_LINK_WITH_EPWM_5            (EPWM_XLINK_TBPRDLINK_2                          )   /*!< link current EPWM with EPWM5 */
#define LL_EPWM_LINK_WITH_EPWM_6            (EPWM_XLINK_TBPRDLINK_2 | EPWM_XLINK_TBPRDLINK_0)   /*!< link current EPWM with EPWM6 */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_Link_Component EPWM Link Component
  * @brief Constants defining the Link Component
  * @{
  */
#define LL_EPWM_LINK_TBPRD             EPWM_XLINK_TBPRDLINK_Pos    /*!< link TBPRD registers */
#define LL_EPWM_LINK_COMP_A            EPWM_XLINK_CMPALINK_Pos     /*!< link COMPA registers */
#define LL_EPWM_LINK_COMP_B            EPWM_XLINK_CMPBLINK_Pos     /*!< link COMPB registers */
#define LL_EPWM_LINK_COMP_C            EPWM_XLINK_CMPCLINK_Pos     /*!< link COMPC registers */
#define LL_EPWM_LINK_COMP_D            EPWM_XLINK_CMPDLINK_Pos     /*!< link COMPD registers */
#define LL_EPWM_LINK_GLDCTL2           EPWM_XLINK_GLDCTL2LINK_Pos  /*!< link GLDCTL2 registers */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_CounterCompare_Module EPWM Counter Compare Module
  * @brief Constants defining the Counter Compare Module
  * @{
  */
#define LL_EPWM_CNTR_COMPARE_A            0x00000000U    /*!< Counter compare A */
#define LL_EPWM_CNTR_COMPARE_B            0x00000001U    /*!< Counter compare B */
#define LL_EPWM_CNTR_COMPARE_C            0x00000002U    /*!< Counter compare C */
#define LL_EPWM_CNTR_COMPARE_D            0x00000003U    /*!< Counter compare D */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_CounterCompareLoad_Mode EPWM Counter Compare Load Mode
  * @brief Constants defining the Counter Compare Load Mode
  * @{
  */
#define LL_EPWM_COMP_LOAD_ON_CNTR_ZERO              0x00000000U                                              /*!< Load when counter equals zero */
#define LL_EPWM_COMP_LOAD_ON_CNTR_PERIOD            EPWM_CMPCTL_LOADAMODE_0                                 /*!< Load when counter equals period */
#define LL_EPWM_COMP_LOAD_ON_CNTR_ZERO_PERIOD       EPWM_CMPCTL_LOADAMODE_1                                 /*!< Load when counter equals zero or period */
#define LL_EPWM_COMP_LOAD_FREEZE                    (EPWM_CMPCTL_LOADAMODE_1 | EPWM_CMPCTL_LOADAMODE_0)    /*!< Freeze shadow to active load */
#define LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_ZERO         EPWM_CMPCTL_LOADASYNC_0                                 /*!< Load on sync or when counter equals zero */
#define LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_PERIOD       (EPWM_CMPCTL_LOADASYNC_0 | EPWM_CMPCTL_LOADAMODE_0)    /*!< Load on sync or when counter equals period */
#define LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_ZERO_PERIOD  (EPWM_CMPCTL_LOADASYNC_0 | EPWM_CMPCTL_LOADAMODE_1)    /*!< Load on sync or when counter equals zero or period */
#define LL_EPWM_COMP_LOAD_ON_SYNC_ONLY              EPWM_CMPCTL_LOADASYNC_1                                 /*!< Load on sync only */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifier_Module EPWM Action Qualifier Module
  * @brief Constants defining the Action Qualifier Module
  * @{
  */
#define LL_EPWM_ACTION_QUALIFIER_A            0x00000000U    /*!< Action Qualifier A */
#define LL_EPWM_ACTION_QUALIFIER_B            0x00000001U    /*!< Action Qualifier B */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierLoad_Mode EPWM Action Qualifier Load Mode
  * @brief Constants defining the Action Qualifier Load Mode
  * @{
  */
#define LL_EPWM_AQ_LOAD_ON_CNTR_ZERO              0x00000000U                                            /*!< Load when counter equals zero */
#define LL_EPWM_AQ_LOAD_ON_CNTR_PERIOD            EPWM_AQCTL_LDAQAMODE_0                                /*!< Load when counter equals period */
#define LL_EPWM_AQ_LOAD_ON_CNTR_ZERO_PERIOD       EPWM_AQCTL_LDAQAMODE_1                                /*!< Load when counter equals zero or period */
#define LL_EPWM_AQ_LOAD_FREEZE                    (EPWM_AQCTL_LDAQAMODE_1 | EPWM_AQCTL_LDAQAMODE_0)    /*!< Freeze shadow to active load */
#define LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO         EPWM_AQCTL_LDAQASYNC_0                                /*!< Load on sync or when counter equals zero */
#define LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_PERIOD       (EPWM_AQCTL_LDAQASYNC_0 | EPWM_AQCTL_LDAQAMODE_0)    /*!< Load on sync or when counter equals period */
#define LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO_PERIOD  (EPWM_AQCTL_LDAQASYNC_0 | EPWM_AQCTL_LDAQAMODE_1)    /*!< Load on sync or when counter equals zero or period */
#define LL_EPWM_AQ_LOAD_ON_SYNC_ONLY              EPWM_AQCTL_LDAQASYNC_1                                /*!< Load on sync only */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierTrigger_Source EPWM Action Qualifier Trigger Source
  * @brief Constants defining the Action Qualifier Trigger Source
  * @{
  */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1        0x00000000U                                                                     /*!< Digital compare event A 1 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_2        (EPWM_AQTSRCSEL_T1SEL_0                                                    )   /*!< Digital compare event A 2 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_1        (EPWM_AQTSRCSEL_T1SEL_1                                                    )   /*!< Digital compare event B 1 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_2        (EPWM_AQTSRCSEL_T1SEL_1 | EPWM_AQTSRCSEL_T1SEL_0                          )   /*!< Digital compare event B 2 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_1         (EPWM_AQTSRCSEL_T1SEL_2                                                    )   /*!< Trip zone 1 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_2         (EPWM_AQTSRCSEL_T1SEL_2 | EPWM_AQTSRCSEL_T1SEL_0                          )   /*!< Trip zone 2 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_3         (EPWM_AQTSRCSEL_T1SEL_2 | EPWM_AQTSRCSEL_T1SEL_1                          )   /*!< Trip zone 3 */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN (EPWM_AQTSRCSEL_T1SEL_2 | EPWM_AQTSRCSEL_T1SEL_1 | EPWM_AQTSRCSEL_T1SEL_0)   /*!< EPWM sync */
#define LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT   (EPWM_AQTSRCSEL_T1SEL_3                                                    )   /*!< Digital compare filter event */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierOutput_Event EPWM Action Qualifier Output Event
  * @brief Constants defining the Action Qualifier Output Event
  * @{
  */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO        EPWM_AQCTLA_ZRO_Pos            /*!< Time base counter equals zero */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD      EPWM_AQCTLA_PRD_Pos            /*!< Time base counter equals period */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA     EPWM_AQCTLA_CAU_Pos            /*!< Time base counter up equals COMPA */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA   EPWM_AQCTLA_CAD_Pos            /*!< Time base counter down equals COMPA */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB     EPWM_AQCTLA_CBU_Pos            /*!< Time base counter up equals COMPB */
#define LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB   EPWM_AQCTLA_CBD_Pos            /*!< Time base counter down equals COMPB */
#define LL_EPWM_AQ_OUTPUT_ON_T1_COUNT_UP          (EPWM_AQCTLA2_T1U_Pos | 1U)    /*!< T1 event on count up */
#define LL_EPWM_AQ_OUTPUT_ON_T1_COUNT_DOWN        (EPWM_AQCTLA2_T1D_Pos | 1U)    /*!< T1 event on count down */
#define LL_EPWM_AQ_OUTPUT_ON_T2_COUNT_UP          (EPWM_AQCTLA2_T2U_Pos | 1U)    /*!< T2 event on count up */
#define LL_EPWM_AQ_OUTPUT_ON_T2_COUNT_DOWN        (EPWM_AQCTLA2_T2D_Pos | 1U)    /*!< T2 event on count down */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifier_Output EPWM Action Qualifier Output
  * @brief Constants defining the Action Qualifier Output
  * @{
  */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE        0x00000000U                                        /*!< No change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW              (EPWM_AQSFRC_ACTSFA_0)                            /*!< Set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH             (EPWM_AQSFRC_ACTSFA_1)                            /*!< Set output pins to High */
#define LL_EPWM_AQ_OUTPUT_TOGGLE           (EPWM_AQSFRC_ACTSFA_1 | EPWM_AQSFRC_ACTSFA_0)    /*!< Toggle the output pins */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierSW_Output EPWM Action Qualifier SW Output
  * @brief Constants defining the Action Qualifier SW Output
  * @{
  */
#define LL_EPWM_AQ_SW_DISABLED        0x00000000U             /*!< No change in the output pins */
#define LL_EPWM_AQ_SW_OUTPUT_LOW      EPWM_AQCSFRC_CSFA_0    /*!< Set output pins to low */
#define LL_EPWM_AQ_SW_OUTPUT_HIGH     EPWM_AQCSFRC_CSFA_1    /*!< Set output pins to High */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierEvent_Action EPWM Action Qualifier Event Action
  * @brief Constants defining the Action Qualifier Event Action
  * @{
  */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_ZERO        0x00000000U                                  /*!< Time base counter equals zero and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_ZERO              EPWM_AQCTLA_ZRO_0                           /*!< Time base counter equals zero and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_ZERO             EPWM_AQCTLA_ZRO_1                           /*!< Time base counter equals zero and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_ZERO           (EPWM_AQCTLA_ZRO_1 | EPWM_AQCTLA_ZRO_0)    /*!< Time base counter equals zero and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_PERIOD      0x00000000U                                  /*!< Time base counter equals period and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_PERIOD            EPWM_AQCTLA_PRD_0                           /*!< Time base counter equals period and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_PERIOD           EPWM_AQCTLA_PRD_1                           /*!< Time base counter equals period and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_PERIOD         (EPWM_AQCTLA_PRD_1 | EPWM_AQCTLA_PRD_0)    /*!< Time base counter equals period and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_CMPA     0x00000000U                                  /*!< Time base counter up equals COMPA and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_UP_CMPA           EPWM_AQCTLA_CAU_0                           /*!< Time base counter up equals COMPA and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_UP_CMPA          EPWM_AQCTLA_CAU_1                           /*!< Time base counter up equals COMPA and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_UP_CMPA        (EPWM_AQCTLA_CAU_1 | EPWM_AQCTLA_CAU_0)    /*!< Time base counter up equals COMPA and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPA   0x00000000U                                  /*!< Time base counter down equals COMPA and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_DOWN_CMPA         EPWM_AQCTLA_CAD_0                           /*!< Time base counter down equals COMPA and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_DOWN_CMPA        EPWM_AQCTLA_CAD_1                           /*!< Time base counter down equals COMPA and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_CMPA      (EPWM_AQCTLA_CAD_1 | EPWM_AQCTLA_CAD_0)    /*!< Time base counter down equals COMPA and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_CMPB     0x00000000U                                  /*!< Time base counter up equals COMPB and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_UP_CMPB           EPWM_AQCTLA_CBU_0                           /*!< Time base counter up equals COMPB and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_UP_CMPB          EPWM_AQCTLA_CBU_1                           /*!< Time base counter up equals COMPB and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_UP_CMPB        (EPWM_AQCTLA_CBU_1 | EPWM_AQCTLA_CBU_0)    /*!< Time base counter up equals COMPB and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPB   0x00000000U                                  /*!< Time base counter down equals COMPB and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_DOWN_CMPB         EPWM_AQCTLA_CBD_0                           /*!< Time base counter down equals COMPB and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_DOWN_CMPB        EPWM_AQCTLA_CBD_1                           /*!< Time base counter down equals COMPB and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_CMPB      (EPWM_AQCTLA_CBD_1 | EPWM_AQCTLA_CBD_0)    /*!< Time base counter down equals COMPB and toggle the output pins */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_AdditionalActionQualifierEvent_Action EPWM Additional Action Qualifier Event Action
  * @brief Constants defining the Additional Action Qualifier Event Action
  * @{
  */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_T1           0x00000000U                                    /*!< T1 event on count up and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_UP_T1                 EPWM_AQCTLA2_T1U_0                            /*!< T1 event on count up and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_UP_T1                EPWM_AQCTLA2_T1U_1                            /*!< T1 event on count up and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_UP_T1              (EPWM_AQCTLA2_T1U_1 | EPWM_AQCTLA2_T1U_0)    /*!< T1 event on count up and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_T1         0x00000000U                                    /*!< T1 event on count down and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_DOWN_T1               EPWM_AQCTLA2_T1D_0                            /*!< T1 event on count down and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_DOWN_T1              EPWM_AQCTLA2_T1D_1                            /*!< T1 event on count down and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_T1            (EPWM_AQCTLA2_T1D_1 | EPWM_AQCTLA2_T1D_0)    /*!< T1 event on count down and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_T2           0x00000000U                                    /*!< T2 event on count up and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_UP_T2                 EPWM_AQCTLA2_T2U_0                            /*!< T2 event on count up and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_UP_T2                EPWM_AQCTLA2_T2U_1                            /*!< T2 event on count up and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_UP_T2              (EPWM_AQCTLA2_T2U_1 | EPWM_AQCTLA2_T2U_0)    /*!< T2 event on count up and toggle the output pins */
#define LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_T2         0x00000000U                                    /*!< T2 event on count down and no change in the output pins */
#define LL_EPWM_AQ_OUTPUT_LOW_DOWN_T2               EPWM_AQCTLA2_T2D_0                            /*!< T2 event on count down and set output pins to low */
#define LL_EPWM_AQ_OUTPUT_HIGH_DOWN_T2              EPWM_AQCTLA2_T2D_1                            /*!< T2 event on count down and set output pins to high */
#define LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_T2            (EPWM_AQCTLA2_T2D_1 | EPWM_AQCTLA2_T2D_0)    /*!< T2 event on count down and toggle the output pins */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifierOutput_Module EPWM Action Qualifier Output Module
  * @brief Constants defining the Action Qualifier Output Module
  * @{
  */
#define LL_EPWM_AQ_OUTPUT_A        0x00000000U    /*!< EPWMxA output */
#define LL_EPWM_AQ_OUTPUT_B        0x00000001U    /*!< EPWMxB output */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ActionQualifier_ContForce EPWM Action Qualifier ContForce
  * @brief Constants defining the Action Qualifier ContForce
  * @{
  */
#define LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO          0x00000000U                                       /*!< Shadow mode load when counter equals zero */
#define LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_PERIOD        (EPWM_AQSFRC_RLDCSF_0                        )   /*!< Shadow mode load when counter equals period */
#define LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO_PERIOD   (EPWM_AQSFRC_RLDCSF_1                        )   /*!< Shadow mode load when counter equals zero or period */
#define LL_EPWM_AQ_SW_IMMEDIATE_LOAD                (EPWM_AQSFRC_RLDCSF_1 | EPWM_AQSFRC_RLDCSF_0)   /*!< No shadow load mode. Immediate mode only. */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBand_Output EPWM Dead Band Output
  * @brief Constants defining the Dead Band Output
  * @{
  */
#define LL_EPWM_DB_OUTPUT_B        EPWM_DBCTL_OUTSWAP_0    /*!< DB output is EPWMB */
#define LL_EPWM_DB_OUTPUT_A        EPWM_DBCTL_OUTSWAP_1    /*!< DB output is EPWMA */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBandDelay_Mode EPWM Dead Band Delay Mode
  * @brief Constants defining the Dead Band Delay Mode
  * @{
  */
#define LL_EPWM_DB_FED        EPWM_DBCTL_OUT_MODE_0    /*!< DB FED (Falling Edge Delay) mode */
#define LL_EPWM_DB_RED        EPWM_DBCTL_OUT_MODE_1    /*!< DB RED (Rising Edge Delay) mode */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBand_Polarity EPWM Dead Band Polarity
  * @brief Constants defining the Dead Band Polarity
  * @{
  */
#define LL_EPWM_DB_POLARITY_ACTIVE_HIGH        0x00000000U             /*!< DB polarity is not inverted */
#define LL_EPWM_DB_POLARITY_ACTIVE_LOW         EPWM_DBCTL_POLSEL_0    /*!< DB polarity is inverted */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBandDelay_Input EPWM Dead Band Delay Input
  * @brief Constants defining the Dead Band Delay Input
  * @{
  */
#define LL_EPWM_DB_INPUT_EPWMA        0x00000000U              /*!< Input signal is EPWMA */
#define LL_EPWM_DB_INPUT_EPWMB        EPWM_DBCTL_IN_MODE_0    /*!< Input signal is EPWMB */
#define LL_EPWM_DB_INPUT_DB_RED        EPWM_DBCTL_DEDB_MODE    /*!< Input signal is the output of Rising Edge delay */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBandControlLoad_Mode EPWM Dead Band Control Load Mode
  * @brief Constants defining the Dead Band Control Load Mode
  * @{
  */
#define LL_EPWM_DB_LOAD_ON_CNTR_ZERO          0x00000000U                                                      /*!< Load when counter equals zero */
#define LL_EPWM_DB_LOAD_ON_CNTR_PERIOD        EPWM_DBCTL2_LOADDBCTLMODE_0                                     /*!< Load when counter equals period */
#define LL_EPWM_DB_LOAD_ON_CNTR_ZERO_PERIOD   EPWM_DBCTL2_LOADDBCTLMODE_1                                     /*!< Load when counter equals zero or period */
#define LL_EPWM_DB_LOAD_FREEZE                (EPWM_DBCTL2_LOADDBCTLMODE_1 | EPWM_DBCTL2_LOADDBCTLMODE_0)    /*!< Freeze shadow to active load */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_RisingEdgeDelayLoad_Mode EPWM Rising Edge Delay Load Mode
  * @brief Constants defining the Rising Edge Delay Load Mode
  * @{
  */
#define LL_EPWM_RED_LOAD_ON_CNTR_ZERO          0x00000000U                                                /*!< Load when counter equals zero */
#define LL_EPWM_RED_LOAD_ON_CNTR_PERIOD        EPWM_DBCTL_LOADREDMODE_0                                  /*!< Load when counter equals period */
#define LL_EPWM_RED_LOAD_ON_CNTR_ZERO_PERIOD   EPWM_DBCTL_LOADREDMODE_1                                  /*!< Load when counter equals zero or period */
#define LL_EPWM_RED_LOAD_FREEZE                (EPWM_DBCTL_LOADREDMODE_1 | EPWM_DBCTL_LOADREDMODE_0)    /*!< Freeze shadow to active load */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_FallingEdgeDelayLoad_Mode EPWM Falling Edge Delay Load Mode
  * @brief Constants defining the Falling Edge Delay Load Mode
  * @{
  */
#define LL_EPWM_FED_LOAD_ON_CNTR_ZERO          0x00000000U                                                /*!< Load when counter equals zero */
#define LL_EPWM_FED_LOAD_ON_CNTR_PERIOD        EPWM_DBCTL_LOADFEDMODE_0                                  /*!< Load when counter equals period */
#define LL_EPWM_FED_LOAD_ON_CNTR_ZERO_PERIOD   EPWM_DBCTL_LOADFEDMODE_1                                  /*!< Load when counter equals zero or period */
#define LL_EPWM_FED_LOAD_FREEZE                (EPWM_DBCTL_LOADFEDMODE_1 | EPWM_DBCTL_LOADFEDMODE_0)    /*!< Freeze shadow to active load */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DeadBandClock_Mode EPWM Dead Band Clock Mode
  * @brief Constants defining the Dead Band Clock Mode
  * @{
  */
#define LL_EPWM_DB_CNTR_CLOCK_FULL_CYCLE     0x00000000U              /*!< Dead band counter runs at TBCLK rate */
#define LL_EPWM_DB_CNTR_CLOCK_HALF_CYCLE     EPWM_DBCTL_HALFCYCLE    /*!< Dead band counter runs at 2*TBCLK rate */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZone_Signals EPWM Trip Zone Signals
  * @brief Constants defining the Trip Zone Signals
  * @{
  */
#define LL_EPWM_TZ_SIGNAL_CBC1          EPWM_TZSEL_CBC1        /*!< TZ1 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_CBC2          EPWM_TZSEL_CBC2        /*!< TZ2 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_CBC3          EPWM_TZSEL_CBC3        /*!< TZ3 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_CBC4          EPWM_TZSEL_CBC4        /*!< TZ4 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_CBC5          EPWM_TZSEL_CBC5        /*!< TZ5 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_CBC6          EPWM_TZSEL_CBC6        /*!< TZ6 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_DCAEVT2       EPWM_TZSEL_DCAEVT2     /*!< DCAEVT2 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_DCBEVT2       EPWM_TZSEL_DCBEVT2     /*!< DCBEVT2 Cycle By Cycle */
#define LL_EPWM_TZ_SIGNAL_OSHT1         EPWM_TZSEL_OSHT1       /*!< One-shot TZ1 */
#define LL_EPWM_TZ_SIGNAL_OSHT2         EPWM_TZSEL_OSHT2       /*!< One-shot TZ2 */
#define LL_EPWM_TZ_SIGNAL_OSHT3         EPWM_TZSEL_OSHT3       /*!< One-shot TZ3 */
#define LL_EPWM_TZ_SIGNAL_OSHT4         EPWM_TZSEL_OSHT4       /*!< One-shot TZ4 */
#define LL_EPWM_TZ_SIGNAL_OSHT5         EPWM_TZSEL_OSHT5       /*!< One-shot TZ5 */
#define LL_EPWM_TZ_SIGNAL_OSHT6         EPWM_TZSEL_OSHT6       /*!< One-shot TZ6 */
#define LL_EPWM_TZ_SIGNAL_DCAEVT1       EPWM_TZSEL_DCAEVT1     /*!< One-shot DCAEVT1 */
#define LL_EPWM_TZ_SIGNAL_DCBEVT1       EPWM_TZSEL_DCBEVT1     /*!< One-shot DCBEVT1 */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZoneDigitalCompare_Output EPWM Trip Zone Digital Compare Output
  * @brief Constants defining the Trip Zone Digital Compare Output
  * @{
  */
#define LL_EPWM_TZ_DC_OUTPUT_A1     EPWM_TZDCSEL_DCAEVT1_Pos    /*!< Digital Compare output 1 A */
#define LL_EPWM_TZ_DC_OUTPUT_A2     EPWM_TZDCSEL_DCAEVT2_Pos    /*!< Digital Compare output 2 A */
#define LL_EPWM_TZ_DC_OUTPUT_B1     EPWM_TZDCSEL_DCBEVT1_Pos    /*!< Digital Compare output 1 B */
#define LL_EPWM_TZ_DC_OUTPUT_B2     EPWM_TZDCSEL_DCBEVT2_Pos    /*!< Digital Compare output 2 B */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZoneDigitalCompareOutput_Event EPWM Trip Zone Digital Compare Output Event
  * @brief Constants defining the Trip Zone Digital Compare Output Event
  * @{
  */
#define LL_EPWM_TZ_EVENT_DC_DISABLED            0x00000000U                                            /*!< Event is disabled */
#define LL_EPWM_TZ_EVENT_DCXH_LOW               EPWM_TZDCSEL_DCAEVT1_0                                /*!< Event when DCxH low */
#define LL_EPWM_TZ_EVENT_DCXH_HIGH              EPWM_TZDCSEL_DCAEVT1_1                                /*!< Event when DCxH high */
#define LL_EPWM_TZ_EVENT_DCXL_LOW               (EPWM_TZDCSEL_DCAEVT1_1 | EPWM_TZDCSEL_DCAEVT1_0)    /*!< Event when DCxL low */
#define LL_EPWM_TZ_EVENT_DCXL_HIGH              (EPWM_TZDCSEL_DCAEVT1_2)                              /*!< Event when DCxL high */
#define LL_EPWM_TZ_EVENT_DCXL_HIGH_DCXH_LOW     (EPWM_TZDCSEL_DCAEVT1_2 | EPWM_TZDCSEL_DCAEVT1_0)    /*!< Event when DCxL high DCxH low */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZone_Event EPWM Trip Zone Event
  * @brief Constants defining the Trip Zone Event
  * @{
  */
#define LL_EPWM_TZ_ACTION_EVENT_TZA         EPWM_TZCTL_TZA_Pos        /*!< TZ1 - TZ6, DCAEVT2, DCAEVT1 */
#define LL_EPWM_TZ_ACTION_EVENT_TZB         EPWM_TZCTL_TZB_Pos        /*!< TZ1 - TZ6, DCBEVT2, DCBEVT1 */
#define LL_EPWM_TZ_ACTION_EVENT_DCAEVT1     EPWM_TZCTL_DCAEVT1_Pos    /*!< DCAEVT1 (Digital Compare A event 1) */
#define LL_EPWM_TZ_ACTION_EVENT_DCAEVT2     EPWM_TZCTL_DCAEVT2_Pos    /*!< DCAEVT2 (Digital Compare A event 2) */
#define LL_EPWM_TZ_ACTION_EVENT_DCBEVT1     EPWM_TZCTL_DCBEVT1_Pos    /*!< DCBEVT1 (Digital Compare B event 1) */
#define LL_EPWM_TZ_ACTION_EVENT_DCBEVT2     EPWM_TZCTL_DCBEVT2_Pos    /*!< DCBEVT2 (Digital Compare B event 2) */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZone_Action EPWM Trip Zone Action
  * @brief Constants defining the Trip Zone Action
  * @{
  */
#define LL_EPWM_TZ_ACTION_HIGH_Z            0x00000000U                                /*!< High impedance output */
#define LL_EPWM_TZ_ACTION_HIGH              EPWM_TZCTL_TZA_0                          /*!< High voltage state */
#define LL_EPWM_TZ_ACTION_LOW               EPWM_TZCTL_TZA_1                          /*!< Low voltage state */
#define LL_EPWM_TZ_ACTION_DISABLE           (EPWM_TZCTL_TZA_1 | EPWM_TZCTL_TZA_0)    /*!< Disable action */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZoneAdvanced_Event EPWM Trip Zone Advanced Event
  * @brief Constants defining the Trip Zone Advanced Event
  * @{
  */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_D           EPWM_TZCTL2_TZBD_Pos    /*!< TZ1 - TZ6, DCBEVT2, DCBEVT1 while counting down */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_U           EPWM_TZCTL2_TZBU_Pos    /*!< TZ1 - TZ6, DCBEVT2, DCBEVT1 while counting up */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_D           EPWM_TZCTL2_TZAD_Pos    /*!< TZ1 - TZ6, DCAEVT2, DCAEVT1 while counting down */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_U           EPWM_TZCTL2_TZAU_Pos    /*!< TZ1 - TZ6, DCAEVT2, DCAEVT1 while counting up */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZoneAdvanced_Action EPWM Trip Zone Advanced Action
  * @brief Constants defining the Trip Zone Advanced Action
  * @{
  */
#define LL_EPWM_TZ_ADV_ACTION_HIGH_Z            0x00000000U                                                          /*!< High impedance output */
#define LL_EPWM_TZ_ADV_ACTION_HIGH              EPWM_TZCTL2_TZAU_0                                                  /*!< High voltage state */
#define LL_EPWM_TZ_ADV_ACTION_LOW               EPWM_TZCTL2_TZAU_1                                                  /*!< Low voltage state */
#define LL_EPWM_TZ_ADV_ACTION_TOGGLE            (EPWM_TZCTL2_TZAU_1 | EPWM_TZCTL2_TZAU_0)                          /*!< Toggle the output */
#define LL_EPWM_TZ_ADV_ACTION_DISABLE           (EPWM_TZCTL2_TZAU_2 | EPWM_TZCTL2_TZAU_1 | EPWM_TZCTL2_TZAU_0)    /*!< Disable action */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_TripZoneAdvDigitalCompare_Event EPWM Trip Zone Adv Digital Compare Event
  * @brief Constants defining the Trip Zone Adv Digital Compare Event
  * @{
  */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_U           EPWM_TZCTLDCA_DCAEVT1U_Pos    /*!< Digital Compare event A/B 1 while counting up */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_D           EPWM_TZCTLDCA_DCAEVT1D_Pos    /*!< Digital Compare event A/B 1 while counting down */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_U           EPWM_TZCTLDCA_DCAEVT2U_Pos    /*!< Digital Compare event A/B 2 while counting up */
#define LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_D           EPWM_TZCTLDCA_DCAEVT2D_Pos    /*!< Digital Compare event A/B 2 while counting down */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_CycleByCycleTripZoneClear_Mode EPWM Cycle By Cycle Trip Zone Clear Mode
  * @brief Constants defining the Cycle By Cycle Trip Zone Clear Mode
  * @{
  */
#define LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO           0x00000000U               /*!< Clear CBC pulse when counter equals zero */
#define LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_PERIOD         EPWM_TZCLR_CBCPULSE_0    /*!< Clear CBC pulse when counter equals period */
#define LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD    EPWM_TZCLR_CBCPULSE_1    /*!< Clear CBC pulse when counter equals zero or period */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_Interrupt_Source EPWM Interrupt Source
  * @brief Constants defining the Interrupt Source
  * @{
  */
#define LL_EPWM_INT_CNTR_DISABLED         0x00000000U                                                                                    /*!< Time-base counter is disabled */
#define LL_EPWM_INT_CNTR_ZERO             EPWM_ETSEL_INTSEL_0                                                                           /*!< Time-base counter equal to zero */
#define LL_EPWM_INT_CNTR_PERIOD           EPWM_ETSEL_INTSEL_1                                                                           /*!< Time-base counter equal to period */
#define LL_EPWM_INT_CNTR_ZERO_OR_PERIOD   (EPWM_ETSEL_INTSEL_1 | EPWM_ETSEL_INTSEL_0)                                                  /*!< Time-base counter equal to zero or period */
#define LL_EPWM_INT_CNTR_U_CMPA           EPWM_ETSEL_INTSEL_2                                                                           /*!< time-base counter equal to CMPA when the timer is incrementing */
#define LL_EPWM_INT_CNTR_U_CMPC           (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL_2)                                                 /*!< time-base counter equal to CMPC when the timer is incrementing */
#define LL_EPWM_INT_CNTR_D_CMPA           (EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_0)                                                  /*!< time-base counter equal to CMPA when the timer is decrementing */
#define LL_EPWM_INT_CNTR_D_CMPC           (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_0)                          /*!< time-base counter equal to CMPC when the timer is decrementing */
#define LL_EPWM_INT_CNTR_U_CMPB           (EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_1)                                                  /*!< time-base counter equal to CMPB when the timer is incrementing */
#define LL_EPWM_INT_CNTR_U_CMPD           (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_1)                          /*!< time-base counter equal to CMPD when the timer is incrementing */
#define LL_EPWM_INT_CNTR_D_CMPB           (EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_1 | EPWM_ETSEL_INTSEL_0)                           /*!< time-base counter equal to CMPB when the timer is decrementing */
#define LL_EPWM_INT_CNTR_D_CMPD           (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL_2 | EPWM_ETSEL_INTSEL_1 | EPWM_ETSEL_INTSEL_0)   /*!< time-base counter equal to CMPD when the timer is decrementing */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ADCStartOfConversion_Type EPWM ADC Start Of Conversion Type
  * @brief Constants defining the ADC Start Of Conversion Type
  * @{
  */
#define LL_EPWM_SOC_A         EPWM_ETSEL_SOCAEN       /*!< SOC A */
#define LL_EPWM_SOC_B         EPWM_ETSEL_SOCBEN       /*!< SOC B */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ADCStartOfConversion_Source EPWM ADC Start Of Conversion Source
  * @brief Constants defining the ADC Start Of Conversion Source
  * @{
  */
#define LL_EPWM_SOC_DCxEVT1                0x00000000U                                                                                         /*!< Event is based on DCxEVT1 */
#define LL_EPWM_SOC_CNTR_ZERO              EPWM_ETSEL_SOCASEL_0                                                                               /*!< Time-base counter equal to zero */
#define LL_EPWM_SOC_CNTR_PERIOD            EPWM_ETSEL_SOCASEL_1                                                                               /*!< Time-base counter equal to period */
#define LL_EPWM_SOC_CNTR_ZERO_OR_PERIOD    (EPWM_ETSEL_SOCASEL_1 | EPWM_ETSEL_SOCASEL_0)                                                     /*!< Time-base counter equal to zero or period */
#define LL_EPWM_SOC_CNTR_U_CMPA            EPWM_ETSEL_SOCASEL_2                                                                               /*!< Time-base counter equal to CMPA when the timer is incrementing */
#define LL_EPWM_SOC_CNTR_U_CMPC            (EPWM_ETSEL_SOCASELCMP | EPWM_ETSEL_SOCASEL_2)                                                    /*!< Time-base counter equal to CMPC when the timer is incrementing */
#define LL_EPWM_SOC_CNTR_D_CMPA            (EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_0)                                                     /*!< Time-base counter equal to CMPA when the timer is decrementing */
#define LL_EPWM_SOC_CNTR_D_CMPC            (EPWM_ETSEL_SOCASELCMP | EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_0)                            /*!< Time-base counter equal to CMPC when the timer is decrementing */
#define LL_EPWM_SOC_CNTR_U_CMPB            (EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_1)                                                     /*!< Time-base counter equal to CMPB when the timer is incrementing */
#define LL_EPWM_SOC_CNTR_U_CMPD            (EPWM_ETSEL_SOCASELCMP | EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_1)                            /*!< Time-base counter equal to CMPD when the timer is incrementing */
#define LL_EPWM_SOC_CNTR_D_CMPB            (EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_1 | EPWM_ETSEL_SOCASEL_0)                             /*!< Time-base counter equal to CMPB when the timer is decrementing */
#define LL_EPWM_SOC_CNTR_D_CMPD            (EPWM_ETSEL_SOCASELCMP | EPWM_ETSEL_SOCASEL_2 | EPWM_ETSEL_SOCASEL_1 | EPWM_ETSEL_SOCASEL_0)    /*!< Time-base counter equal to CMPD when the timer is decrementing */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompare_Type EPWM Digital Compare Type
  * @brief Constants defining the Digital Compare Type
  * @{
  */
#define LL_EPWM_DC_TYPE_DCAH         0x00000000U       /*!< Digital Compare A High */
#define LL_EPWM_DC_TYPE_DCAL         0x00000001U       /*!< Digital Compare A Low */
#define LL_EPWM_DC_TYPE_DCBH         0x00000002U       /*!< Digital Compare B High */
#define LL_EPWM_DC_TYPE_DCBL         0x00000003U       /*!< Digital Compare B Low */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareTrip_Input EPWM Digital Compare Trip Input
  * @brief Constants defining the Digital Compare Trip Input
  * @{
  */
#define LL_EPWM_DC_TRIP_TRIPIN1       0x00000000U                                                                                        /*!< Trip 1 */
#define LL_EPWM_DC_TRIP_TRIPIN2       EPWM_DCTRIPSEL_DCAHCOMPSEL_0                                                                      /*!< Trip 2 */
#define LL_EPWM_DC_TRIP_TRIPIN3       EPWM_DCTRIPSEL_DCAHCOMPSEL_1                                                                      /*!< Trip 3 */
#define LL_EPWM_DC_TRIP_TRIPIN4       (EPWM_DCTRIPSEL_DCAHCOMPSEL_1 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)                                    /*!< Trip 4 */
#define LL_EPWM_DC_TRIP_TRIPIN5       EPWM_DCTRIPSEL_DCAHCOMPSEL_2                                                                      /*!< Trip 5 */
#define LL_EPWM_DC_TRIP_TRIPIN6       (EPWM_DCTRIPSEL_DCAHCOMPSEL_2 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)                                    /*!< Trip 6 */
#define LL_EPWM_DC_TRIP_TRIPIN7       (EPWM_DCTRIPSEL_DCAHCOMPSEL_2 | EPWM_DCTRIPSEL_DCAHCOMPSEL_1)                                    /*!< Trip 7 */
#define LL_EPWM_DC_TRIP_TRIPIN8       (EPWM_DCTRIPSEL_DCAHCOMPSEL_2 | EPWM_DCTRIPSEL_DCAHCOMPSEL_1 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)    /*!< Trip 8 */
#define LL_EPWM_DC_TRIP_TRIPIN9       EPWM_DCTRIPSEL_DCAHCOMPSEL_3                                                                      /*!< Trip 9 */
#define LL_EPWM_DC_TRIP_TRIPIN10      (EPWM_DCTRIPSEL_DCAHCOMPSEL_3 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)                                    /*!< Trip 10 */
#define LL_EPWM_DC_TRIP_TRIPIN11      (EPWM_DCTRIPSEL_DCAHCOMPSEL_3 | EPWM_DCTRIPSEL_DCAHCOMPSEL_1)                                    /*!< Trip 11 */
#define LL_EPWM_DC_TRIP_TRIPIN12      (EPWM_DCTRIPSEL_DCAHCOMPSEL_3 | EPWM_DCTRIPSEL_DCAHCOMPSEL_1 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)    /*!< Trip 12 */
#define LL_EPWM_DC_TRIP_COMBINATION   (EPWM_DCTRIPSEL_DCAHCOMPSEL_3 | EPWM_DCTRIPSEL_DCAHCOMPSEL_2 | EPWM_DCTRIPSEL_DCAHCOMPSEL_1 | EPWM_DCTRIPSEL_DCAHCOMPSEL_0)   /*!< All Trips (Trip1 - Trip 12) are selected */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareTripCombination_Input EPWM Digital Compare Trip Combination Input
  * @brief Constants defining the Digital Compare Trip Combination Input
  * @{
  */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN1   EPWM_DCAHTRIPSEL_TRIPINPUT1    /*!< Combinational Trip 1 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN2   EPWM_DCAHTRIPSEL_TRIPINPUT2    /*!< Combinational Trip 2 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN3   EPWM_DCAHTRIPSEL_TRIPINPUT3    /*!< Combinational Trip 3 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN4   EPWM_DCAHTRIPSEL_TRIPINPUT4    /*!< Combinational Trip 4 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN5   EPWM_DCAHTRIPSEL_TRIPINPUT5    /*!< Combinational Trip 5 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN6   EPWM_DCAHTRIPSEL_TRIPINPUT6    /*!< Combinational Trip 6 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN7   EPWM_DCAHTRIPSEL_TRIPINPUT7    /*!< Combinational Trip 7 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN8   EPWM_DCAHTRIPSEL_TRIPINPUT8    /*!< Combinational Trip 8 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN9   EPWM_DCAHTRIPSEL_TRIPINPUT9    /*!< Combinational Trip 9 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN10  EPWM_DCAHTRIPSEL_TRIPINPUT10   /*!< Combinational Trip 10 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN11  EPWM_DCAHTRIPSEL_TRIPINPUT11   /*!< Combinational Trip 11 input */
#define LL_EPWM_DC_COMBINATIONAL_TRIPIN12  EPWM_DCAHTRIPSEL_TRIPINPUT12   /*!< Combinational Trip 12 input */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareBlanking_Pulse EPWM Digital Compare Blanking Pulse
  * @brief Constants defining the Digital Compare Blanking Pulse
  * @{
  */
#define LL_EPWM_DC_WINDOW_START_CNTR_PERIOD        0x00000000U                  /*!< Time base counter equals period */
#define LL_EPWM_DC_WINDOW_START_CNTR_ZERO          EPWM_DCFCTL_PULSESEL_0      /*!< Time base counter equals zero */
#define LL_EPWM_DC_WINDOW_START_CNTR_ZERO_PERIOD   EPWM_DCFCTL_PULSESEL_1      /*!< Time base counter equals zero or period */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareFilter_Input EPWM Digital Compare Filter Input
  * @brief Constants defining the Digital Compare Filter Input
  * @{
  */
#define LL_EPWM_DC_WINDOW_SOURCE_DCAEVT1   0x00000000U                                      /*!< DC filter signal source is DCAEVT1*/
#define LL_EPWM_DC_WINDOW_SOURCE_DCAEVT2   EPWM_DCFCTL_SRCSEL_0                            /*!< DC filter signal source is DCAEVT2*/
#define LL_EPWM_DC_WINDOW_SOURCE_DCBEVT1   EPWM_DCFCTL_SRCSEL_1                            /*!< DC filter signal source is DCBEVT1*/
#define LL_EPWM_DC_WINDOW_SOURCE_DCBEVT2   (EPWM_DCFCTL_SRCSEL_1 | EPWM_DCFCTL_SRCSEL_0)  /*!< DC filter signal source is DCBEVT2*/
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompare_Module EPWM Digital Compare Module
  * @brief Constants defining the Digital Compare Module
  * @{
  */
#define LL_EPWM_DC_MODULE_A   0x00000000U  /*!< Digital Compare Module A */
#define LL_EPWM_DC_MODULE_B   0x00000001U  /*!< Digital Compare Module B */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompare_Event EPWM Digital Compare Event
  * @brief Constants defining the Digital Compare Event
  * @{
  */
#define LL_EPWM_DC_EVENT_1   EPWM_DCACTL_EVT1SRCSEL  /*!< Digital Compare Event number 1 */
#define LL_EPWM_DC_EVENT_2   EPWM_DCACTL_EVT2SRCSEL  /*!< Digital Compare Event number 2 */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareEvent_Source EPWM Digital Compare Event Source
  * @brief Constants defining the Digital Compare Event Source
  * @{
  */
#define LL_EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL   0x00000000U              /*!< Signal source is unfiltered (DCAEVT1/2) */
#define LL_EPWM_DC_EVENT_SOURCE_FILT_SIGNAL   EPWM_DCACTL_EVT1SRCSEL  /*!< Signal source is filtered (DCEVTFILT) */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareSync_Mode EPWM Digital Compare Sync Mode
  * @brief Constants defining the Digital Compare Sync Mode
  * @{
  */
#define LL_EPWM_DC_EVENT_INPUT_SYNCED       0x00000000U                  /*!< DC input signal is synced with TBCLK */
#define LL_EPWM_DC_EVENT_INPUT_NOT_SYNCED   EPWM_DCACTL_EVT1FRCSYNCSEL  /*!< DC input signal is not synced with TBCLK */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_GlobalLoad_Trigger EPWM Global Load Trigger
  * @brief Constants defining the Global Load Trigger
  * @{
  */
#define LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO               0x00000000U                                         /*!< Load when counter is equal to zero */
#define LL_EPWM_GL_LOAD_PULSE_CNTR_PERIOD             EPWM_GLDCTL_GLDMODE_0                              /*!< Load when counter is equal to period */
#define LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO_PERIOD        EPWM_GLDCTL_GLDMODE_1                              /*!< Load when counter is equal to zero or period */
#define LL_EPWM_GL_LOAD_PULSE_SYNC                    (EPWM_GLDCTL_GLDMODE_1 | EPWM_GLDCTL_GLDMODE_0)   /*!< Load on sync event */
#define LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_ZERO       EPWM_GLDCTL_GLDMODE_2                              /*!< Load on sync event or when counter  is equal to zero */
#define LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_PERIOD     (EPWM_GLDCTL_GLDMODE_2 | EPWM_GLDCTL_GLDMODE_0)   /*!< Load on sync event or when counter  is equal to period */
#define LL_EPWM_GL_LOAD_PULSE_SYNC_CNTR_ZERO_PERIOD   (EPWM_GLDCTL_GLDMODE_2 | EPWM_GLDCTL_GLDMODE_1)   /*!< Load on sync event or when counter is equal to period or zero */
#define LL_EPWM_GL_LOAD_PULSE_GLOBAL_FORCE            (EPWM_GLDCTL_GLDMODE_3 | EPWM_GLDCTL_GLDMODE_2 | EPWM_GLDCTL_GLDMODE_1 | EPWM_GLDCTL_GLDMODE_0)   /*!< Load on global force */
/**
  * @}
  */

#if defined(EPWM_HR_SUPPORT)
/** @defgroup EPWM_LL_EC_GlobalLoad_Registers EPWM Global Load Registers
  * @brief Constants defining the Global Load Registers
  * @{
  */
#define LL_EPWM_GL_REGISTER_TBPRD_TBPRDHR   EPWM_GLDCFG_TBPRD_TBPRDRHR   /*!< Global load TBPRD:TBPRDHR */
#define LL_EPWM_GL_REGISTER_CMPA_CMPAHR     EPWM_GLDCFG_CMPA_CMPAHR      /*!< Global load CMPA:CMPAHR */
#define LL_EPWM_GL_REGISTER_CMPB_CMPBHR     EPWM_GLDCFG_CMPB_CMPBHR      /*!< Global load CMPB:CMPBHR */
#define LL_EPWM_GL_REGISTER_CMPC            EPWM_GLDCFG_CMPC             /*!< Global load CMPC */
#define LL_EPWM_GL_REGISTER_CMPD            EPWM_GLDCFG_CMPD             /*!< Global load CMPD */
#define LL_EPWM_GL_REGISTER_DBRED_DBREDHR   EPWM_GLDCFG_DBRED_DBREDHR    /*!< Global load DBRED:DBREDHR */
#define LL_EPWM_GL_REGISTER_DBFED_DBFEDHR   EPWM_GLDCFG_DBFED_DBFEDHR    /*!< Global load DBFED:DBFEDHR */
#define LL_EPWM_GL_REGISTER_DBCTL           EPWM_GLDCFG_DBCTL            /*!< Global load DBCTL */
#define LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2  EPWM_GLDCFG_AQCTLA_AQCTLA2   /*!< Global load AQCTLA/A2 */
#define LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2  EPWM_GLDCFG_AQCTLB_AQCTLB2   /*!< Global load AQCTLB/B2 */
#define LL_EPWM_GL_REGISTER_AQCSFRC         EPWM_GLDCFG_AQCSPRC          /*!< Global load AQCSFRC */
/**
  * @}
  */
#else
/** @defgroup EPWM_LL_EC_GlobalLoad_Registers EPWM Global Load Registers
  * @brief Constants defining the Global Load Registers
  * @{
  */
#define LL_EPWM_GL_REGISTER_TBPRD           EPWM_GLDCFG_TBPRD_TBPRDRHR   /*!< Global load TBPRD */
#define LL_EPWM_GL_REGISTER_CMPA            EPWM_GLDCFG_CMPA_CMPAHR      /*!< Global load CMPA */
#define LL_EPWM_GL_REGISTER_CMPB            EPWM_GLDCFG_CMPB_CMPBHR      /*!< Global load CMPB */
#define LL_EPWM_GL_REGISTER_CMPC            EPWM_GLDCFG_CMPC             /*!< Global load CMPC */
#define LL_EPWM_GL_REGISTER_CMPD            EPWM_GLDCFG_CMPD             /*!< Global load CMPD */
#define LL_EPWM_GL_REGISTER_DBRED           EPWM_GLDCFG_DBRED_DBREDHR    /*!< Global load DBRED */
#define LL_EPWM_GL_REGISTER_DBFED           EPWM_GLDCFG_DBFED_DBFEDHR    /*!< Global load DBFED */
#define LL_EPWM_GL_REGISTER_DBCTL           EPWM_GLDCFG_DBCTL            /*!< Global load DBCTL */
#define LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2  EPWM_GLDCFG_AQCTLA_AQCTLA2   /*!< Global load AQCTLA/A2 */
#define LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2  EPWM_GLDCFG_AQCTLB_AQCTLB2   /*!< Global load AQCTLB/B2 */
#define LL_EPWM_GL_REGISTER_AQCSFRC         EPWM_GLDCFG_AQCSPRC          /*!< Global load AQCSFRC */
/**
  * @}
  */
#endif

/** @defgroup EPWM_LL_EC_ValleyTrigger_Source EPWM Valley Trigger Source
  * @brief Constants defining the Valley Trigger Source
  * @{
  */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE           0x00000000U                                                                     /*!< Valley capture trigged by software */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO          EPWM_VCAPCTL_TRIGSEL_0                                                         /*!< Valley capture trigged by when counter is equal to zero */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_PERIOD        EPWM_VCAPCTL_TRIGSEL_1                                                         /*!< Valley capture trigged by when counter is equal period */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO_PERIOD   (EPWM_VCAPCTL_TRIGSEL_1 | EPWM_VCAPCTL_TRIGSEL_0)                             /*!< Valley capture trigged when counter is equal to zero or period */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT1            EPWM_VCAPCTL_TRIGSEL_2                                                         /*!< Valley capture trigged by DCAEVT1 (Digital Compare A event 1) */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT2            (EPWM_VCAPCTL_TRIGSEL_2 | EPWM_VCAPCTL_TRIGSEL_0)                             /*!< Valley capture trigged by DCAEVT2 (Digital Compare A event 2) */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT1            (EPWM_VCAPCTL_TRIGSEL_2 | EPWM_VCAPCTL_TRIGSEL_1)                             /*!< Valley capture trigged by DCBEVT1 (Digital Compare B event 1) */
#define LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT2            (EPWM_VCAPCTL_TRIGSEL_2 | EPWM_VCAPCTL_TRIGSEL_1 | EPWM_VCAPCTL_TRIGSEL_0)   /*!< Valley capture trigged by DCBEVT2 (Digital Compare B event 2) */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ValleyCounter_Edge EPWM Valley Counter Edge
  * @brief Constants defining the Valley Counter Edge
  * @{
  */
#define LL_EPWM_VALLEY_COUNT_START_EDGE           EPWM_VCNTCFG_STARTEDGESTS   /*!< Valley count start edge */
#define LL_EPWM_VALLEY_COUNT_STOP_EDGE            EPWM_VCNTCFG_STOPEDGESTS    /*!< Valley count stop edge */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ValleyDelay_Mode EPWM Valley Delay Mode
  * @brief Constants defining the Valley Delay Mode
  * @{
  */
#define LL_EPWM_VALLEY_DELAY_MODE_SW_DELAY                      0x00000000U                                               /*!< Delay value equals the offset value defines by software */
#define LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SW_DELAY           EPWM_VCAPCTL_VDELAYDIV_0                                 /*!< Delay value equals the sum of the Hardware counter value and the offset value defines by software */
#define LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_1_SW_DELAY   EPWM_VCAPCTL_VDELAYDIV_1                                 /*!< Delay value equals the the Hardware counter shifted by (1 + the offset value defines by software) */
#define LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_2_SW_DELAY   (EPWM_VCAPCTL_VDELAYDIV_1 | EPWM_VCAPCTL_VDELAYDIV_0)   /*!< Delay value equals the the Hardware counter shifted by (2 + the offset value defines by software) */
#define LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_4_SW_DELAY   EPWM_VCAPCTL_VDELAYDIV_2                                 /*!< Delay value equals the the Hardware counter shifted by (4 + the offset value defines by software) */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareEdgeFilter_Mode EPWM Digital Compare Edge Filter Mode
  * @brief Constants defining the Digital Compare Edge Filter Mode
  * @{
  */
#define LL_EPWM_DC_EDGEFILT_MODE_RISING    0x00000000U               /*!< Digital Compare Edge filter low to high edge mode */
#define LL_EPWM_DC_EDGEFILT_MODE_FALLING   EPWM_DCFCTL_EDGEMODE_0   /*!< Digital Compare Edge filter high to low edge mode */
#define LL_EPWM_DC_EDGEFILT_MODE_BOTH      EPWM_DCFCTL_EDGEMODE_1   /*!< Digital Compare Edge filter both edges mode */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_DigitalCompareEdgeFilterEdge_Count EPWM Digital Compare Edge Filter Edge Count
  * @brief Constants defining the Digital Compare Edge Filter Edge Count
  * @{
  */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_0    0x00000000U                                                                         /*!< Digital Compare Edge filter edge count = 0 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_1    EPWM_DCFCTL_EDGECOUNT_0                                                            /*!< Digital Compare Edge filter edge count = 1 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_2    EPWM_DCFCTL_EDGECOUNT_1                                                            /*!< Digital Compare Edge filter edge count = 2 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_3    (EPWM_DCFCTL_EDGECOUNT_1 | EPWM_DCFCTL_EDGECOUNT_0)                               /*!< Digital Compare Edge filter edge count = 3 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_4    EPWM_DCFCTL_EDGECOUNT_2                                                            /*!< Digital Compare Edge filter edge count = 4 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_5    (EPWM_DCFCTL_EDGECOUNT_2 | EPWM_DCFCTL_EDGECOUNT_0)                               /*!< Digital Compare Edge filter edge count = 5 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_6    (EPWM_DCFCTL_EDGECOUNT_2 | EPWM_DCFCTL_EDGECOUNT_1)                               /*!< Digital Compare Edge filter edge count = 6 */
#define LL_EPWM_DC_EDGEFILT_EDGECNT_7    (EPWM_DCFCTL_EDGECOUNT_2 | EPWM_DCFCTL_EDGECOUNT_1 | EPWM_DCFCTL_EDGECOUNT_0)    /*!< Digital Compare Edge filter edge count = 7 */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_LockRegister_Group EPWM Lock Register Group
  * @brief Constants defining the Lock Register Group
  * @{
  */
#if defined(EPWM_HR_SUPPORT)
#define LL_EPWM_REGISTER_GROUP_EPWM              EPWM_EPWMLOCK_HRLOCK       /*!< EPWM register group */
#endif
#define LL_EPWM_REGISTER_GROUP_GLOBAL_LOAD       EPWM_EPWMLOCK_GLLOCK       /*!< Global load register group */
#define LL_EPWM_REGISTER_GROUP_TRIP_ZONE         EPWM_EPWMLOCK_TZCFGLOCK    /*!< Trip zone register group   */
#define LL_EPWM_REGISTER_GROUP_TRIP_ZONE_CLEAR   EPWM_EPWMLOCK_TZCLRLOCK    /*!< Trip zone clear group      */
#define LL_EPWM_REGISTER_GROUP_DIGITAL_COMPARE   EPWM_EPWMLOCK_DCLOCK       /*!< Digital compare group      */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_Channel EPWM Channel
  * @brief Constants defining the Channel
  * @{
  */
#define LL_EPWM_CHANNEL_A   0x00000000U  /*!< EPWM A */
#define LL_EPWM_CHANNEL_B   0x00000001U  /*!< EPWM B */
/**
  * @}
  */

#if defined(EPWM_HR_SUPPORT)
/** @defgroup EPWM_LL_EC_MEPEdge_Mode MEP Edge Mode
  * @brief Constants defining the MEP Edge Mode
  * @{
  */
#define LL_EPWM_MEP_CTRL_DISABLE                    0x00000000U                                         /*!< EPWM is disabled */
#define LL_EPWM_MEP_CTRL_RISING_EDGE                EPWM_HRCNFG_EDGMODE_0                              /*!< MEP controls rising edge */
#define LL_EPWM_MEP_CTRL_FALLING_EDGE               EPWM_HRCNFG_EDGMODE_1                              /*!< MEP controls falling edge */
#define LL_EPWM_MEP_CTRL_RISING_AND_FALLING_EDGE    (EPWM_HRCNFG_EDGMODE_1 | EPWM_HRCNFG_EDGMODE_0)   /*!< MEP controls both rising and falling edge */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_MEPCtrl_Mode MEP Ctrl Mode
  * @brief Constants defining the MEP Ctrl Mode
  * @{
  */
#define LL_EPWM_MEP_DUTY_PERIOD_CTRL          0x00000000U            /*!< CMPAHR/CMPBHR or TBPRDHR controls MEP edge */
#define LL_EPWM_MEP_PHASE_CTRL                EPWM_HRCNFG_CTLMODE   /*!< TBPHSHR controls MEP edge */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_Load_Mode Load Mode
  * @brief Constants defining the Load Mode
  * @{
  */
#define LL_EPWM_LOAD_ON_CNTR_ZERO              0x00000000U             /*!< load when counter equals zero */
#define LL_EPWM_LOAD_ON_CNTR_PERIOD            EPWM_HRCNFG_HRLOAD_0   /*!< load when counter equals period */
#define LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD       EPWM_HRCNFG_HRLOAD_1   /*!< load when counter equals zero or period */
/**
  * @}
  */
  
/** @defgroup EPWM_LL_EC_ChannelB_Output ChannelB Output
  * @brief Constants defining the ChannelB Output
  * @{
  */
#define LL_EPWM_OUTPUT_ON_B_NORMAL              0x00000000U            /*!< EPWMxB output is normal. */
#define LL_EPWM_OUTPUT_ON_B_INV_A               EPWM_HRCNFG_SELOUTB   /*!< EPWMxB output is inverted version of EPWMxA signal*/
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SyncPulse_Source Sync Pulse Source
  * @brief Constants defining the Sync Pulse Source
  * @{
  */
#define LL_EPWM_PWMSYNC_SOURCE_PERIOD            0x00000000U                                                     /*!< Counter equals Period */
#define LL_EPWM_PWMSYNC_SOURCE_ZERO              EPWM_HRPCTL_EPWMSYNCSEL                                       /*!< Counter equals zero */
#define LL_EPWM_PWMSYNC_SOURCE_COMPC_UP          EPWM_HRPCTL_EPWMSYNCSELX_2                                    /*!< Counter equals COMPC when counting up */
#define LL_EPWM_PWMSYNC_SOURCE_COMPC_DOWN        (EPWM_HRPCTL_EPWMSYNCSELX_2 | EPWM_HRPCTL_EPWMSYNCSELX_0)   /*!< Counter equals COMPC when counting down */
#define LL_EPWM_PWMSYNC_SOURCE_COMPD_UP          (EPWM_HRPCTL_EPWMSYNCSELX_2 | EPWM_HRPCTL_EPWMSYNCSELX_1)   /*!< Counter equals COMPD when counting up */
#define LL_EPWM_PWMSYNC_SOURCE_COMPD_DOWN        (EPWM_HRPCTL_EPWMSYNCSELX_2 | EPWM_HRPCTL_EPWMSYNCSELX_1 | EPWM_HRPCTL_EPWMSYNCSELX_0)   /*!< Counter equals COMPD when counting down */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_MEPDeadBandEdge_Mode MEP Dead Band Edge Mode
  * @brief Constants defining the MEP Dead Band Edge Mode
  * @{
  */
#define LL_EPWM_DB_MEP_CTRL_DISABLE        0x00000000U                                               /*!< EPWM is disabled */
#define LL_EPWM_DB_MEP_CTRL_RED            EPWM_HRCNFG2_EDGMODEDB_0                                 /*!< MEP controls Rising Edge Delay */
#define LL_EPWM_DB_MEP_CTRL_FED            EPWM_HRCNFG2_EDGMODEDB_1                                 /*!< MEP controls Falling Edge Delay */
#define LL_EPWM_DB_MEP_CTRL_RED_FED        (EPWM_HRCNFG2_EDGMODEDB_1 | EPWM_HRCNFG2_EDGMODEDB_0)   /*!< MEP controls both Falling and Rising edge delay */
/**
  * @}
  */
#endif

/** @defgroup EPWM_LL_EC_XBARZone_Flag1 XBAR Zone flag1
  * @brief Constants defining the XBAR Zone flag1
  * @{
  */
#define LL_EPWM_XBAR_FLAG1_COMP1_OUT       EPWM_XBARFLG1_COMP1_OUT_FLG      /*!< XBAR flag1 COMP1_OUT flag */
#define LL_EPWM_XBAR_FLAG1_COMP2_OUT       EPWM_XBARFLG1_COMP2_OUT_FLG      /*!< XBAR flag1 COMP2_OUT flag */
#define LL_EPWM_XBAR_FLAG1_COMP3_OUT       EPWM_XBARFLG1_COMP3_OUT_FLG      /*!< XBAR flag1 COMP3_OUT flag */
#define LL_EPWM_XBAR_FLAG1_COMP4_OUT       EPWM_XBARFLG1_COMP4_OUT_FLG      /*!< XBAR flag1 COMP4_OUT flag */
#define LL_EPWM_XBAR_FLAG1_INPUT1          EPWM_XBARFLG1_INPUT1_FLG         /*!< XBAR flag1 INPUT1 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT2          EPWM_XBARFLG1_INPUT2_FLG         /*!< XBAR flag1 INPUT2 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT3          EPWM_XBARFLG1_INPUT3_FLG         /*!< XBAR flag1 INPUT3 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT4          EPWM_XBARFLG1_INPUT4_FLG         /*!< XBAR flag1 INPUT4 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT5          EPWM_XBARFLG1_INPUT5_FLG         /*!< XBAR flag1 INPUT5 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT6          EPWM_XBARFLG1_INPUT6_FLG         /*!< XBAR flag1 INPUT6 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT7          EPWM_XBARFLG1_INPUT7_FLG         /*!< XBAR flag1 INPUT7 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT8          EPWM_XBARFLG1_INPUT8_FLG         /*!< XBAR flag1 INPUT8 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT9          EPWM_XBARFLG1_INPUT9_FLG         /*!< XBAR flag1 INPUT9 flag    */
#define LL_EPWM_XBAR_FLAG1_INPUT10         EPWM_XBARFLG1_INPUT10_FLG        /*!< XBAR flag1 INPUT10 flag   */
#define LL_EPWM_XBAR_FLAG1_INPUT11         EPWM_XBARFLG1_INPUT11_FLG        /*!< XBAR flag1 INPUT11 flag   */
#define LL_EPWM_XBAR_FLAG1_INPUT12         EPWM_XBARFLG1_INPUT12_FLG        /*!< XBAR flag1 INPUT12 flag   */
#define LL_EPWM_XBAR_FLAG1_INPUT13         EPWM_XBARFLG1_INPUT13_FLG        /*!< XBAR flag1 INPUT13 flag   */
#define LL_EPWM_XBAR_FLAG1_INPUT14         EPWM_XBARFLG1_INPUT14_FLG        /*!< XBAR flag1 INPUT14 flag   */
#define LL_EPWM_XBAR_FLAG1_ADCSOCA         EPWM_XBARFLG1_ADCSOCA_FLG        /*!< XBAR flag1 ADCSOCA flag   */
#define LL_EPWM_XBAR_FLAG1_ADCSOCB         EPWM_XBARFLG1_ADCSOCB_FLG        /*!< XBAR flag1 ADCSOCB flag   */
#define LL_EPWM_XBAR_FLAG1_ADC1_AWD1       EPWM_XBARFLG1_ADC1_AWD1_FLG      /*!< XBAR flag1 ADC1_AWD1 flag */
#define LL_EPWM_XBAR_FLAG1_ADC1_AWD2       EPWM_XBARFLG1_ADC1_AWD2_FLG      /*!< XBAR flag1 ADC1_AWD2 flag */
#define LL_EPWM_XBAR_FLAG1_ADC1_AWD3       EPWM_XBARFLG1_ADC1_AWD3_FLG      /*!< XBAR flag1 ADC1_AWD3 flag */
#define LL_EPWM_XBAR_FLAG1_ADC2_AWD1       EPWM_XBARFLG1_ADC2_AWD1_FLG      /*!< XBAR flag1 ADC2_AWD1 flag */
#define LL_EPWM_XBAR_FLAG1_ADC2_AWD2       EPWM_XBARFLG1_ADC2_AWD2_FLG      /*!< XBAR flag1 ADC2_AWD2 flag */
#define LL_EPWM_XBAR_FLAG1_ADC2_AWD3       EPWM_XBARFLG1_ADC2_AWD3_FLG      /*!< XBAR flag1 ADC2_AWD3 flag */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH1        EPWM_XBARFLG1_TIM1_CH1_FLG       /*!< XBAR flag1 TIM1_CH1 flag  */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH2        EPWM_XBARFLG1_TIM1_CH2_FLG       /*!< XBAR flag1 TIM1_CH2 flag  */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH3        EPWM_XBARFLG1_TIM1_CH3_FLG       /*!< XBAR flag1 TIM1_CH3 flag  */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH4        EPWM_XBARFLG1_TIM1_CH4_FLG       /*!< XBAR flag1 TIM1_CH4 flag  */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH5        EPWM_XBARFLG1_TIM1_CH5_FLG       /*!< XBAR flag1 TIM1_CH5 flag  */
#define LL_EPWM_XBAR_FLAG1_TIM1_CH6        EPWM_XBARFLG1_TIM1_CH6_FLG       /*!< XBAR flag1 TIM1_CH6 flag  */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_XBARZone_Flag2 XBAR Zone flag2
  * @brief Constants defining the XBAR Zone flag2
  * @{
  */
#define LL_EPWM_XBAR_FLAG2_TIM2_CH1        EPWM_XBARFLG2_TIM2_CH1_FLG       /*!< XBAR flag2 TIM2_CH1 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM2_CH2        EPWM_XBARFLG2_TIM2_CH2_FLG       /*!< XBAR flag2 TIM2_CH2 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM2_CH3        EPWM_XBARFLG2_TIM2_CH3_FLG       /*!< XBAR flag2 TIM2_CH3 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM2_CH4        EPWM_XBARFLG2_TIM2_CH4_FLG       /*!< XBAR flag2 TIM2_CH4 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM3_CH1        EPWM_XBARFLG2_TIM3_CH1_FLG       /*!< XBAR flag2 TIM3_CH1 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM3_CH2        EPWM_XBARFLG2_TIM3_CH2_FLG       /*!< XBAR flag2 TIM3_CH2 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM3_CH3        EPWM_XBARFLG2_TIM3_CH3_FLG       /*!< XBAR flag2 TIM3_CH3 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM3_CH4        EPWM_XBARFLG2_TIM3_CH4_FLG       /*!< XBAR flag2 TIM3_CH4 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH1        EPWM_XBARFLG2_TIM8_CH1_FLG       /*!< XBAR flag2 TIM8_CH1 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH2        EPWM_XBARFLG2_TIM8_CH2_FLG       /*!< XBAR flag2 TIM8_CH2 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH3        EPWM_XBARFLG2_TIM8_CH3_FLG       /*!< XBAR flag2 TIM8_CH3 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH4        EPWM_XBARFLG2_TIM8_CH4_FLG       /*!< XBAR flag2 TIM8_CH4 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH5        EPWM_XBARFLG2_TIM8_CH5_FLG       /*!< XBAR flag2 TIM8_CH5 flag   */
#define LL_EPWM_XBAR_FLAG2_TIM8_CH6        EPWM_XBARFLG2_TIM8_CH6_FLG       /*!< XBAR flag2 TIM8_CH6 flag   */
#define LL_EPWM_XBAR_FLAG2_EPWM_SCOUT     EPWM_XBARFLG2_EPWM_SCOUT_FLG    /*!< XBAR flag2 EPWM_SCOUT flag*/
#define LL_EPWM_XBAR_FLAG2_CPUHALT         EPWM_XBARFLG2_CPUHALT_FLG        /*!< XBAR flag2 CPUHALT flag    */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_XBAREPWMx_CLK XBAR EPWMx clock
  * @brief Constants defining the XBAR Zone EPWMx clock
  * @{
  */
#define LL_EPWM_CLK_EPWM1            EPWM_CLKEN_EPWM1_CLK_EN     /*!< EPWM1 clock enable */
#define LL_EPWM_CLK_EPWM2            EPWM_CLKEN_EPWM2_CLK_EN     /*!< EPWM2 clock enable */
#define LL_EPWM_CLK_EPWM3            EPWM_CLKEN_EPWM3_CLK_EN     /*!< EPWM3 clock enable */
#define LL_EPWM_CLK_EPWM4            EPWM_CLKEN_EPWM4_CLK_EN     /*!< EPWM4 clock enable */
#define LL_EPWM_CLK_EPWM5            EPWM_CLKEN_EPWM5_CLK_EN     /*!< EPWM5 clock enable */
#define LL_EPWM_CLK_EPWM6            EPWM_CLKEN_EPWM6_CLK_EN     /*!< EPWM6 clock enable */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SCOUTEPWMx_SYNCO SCOUT EPWMx SYNCO
  * @brief Constants defining the SCOUT EPWMx SYNCO
  * @{
  */
#define LL_EPWM_SCOUT_EPWM1_SYNCO         0x00000000U                                                  /*!< EPWM1 SYNCO */
#define LL_EPWM_SCOUT_EPWM2_SYNCO         EPWM_SCOUT_CFG_SCOUT_SEL_0                                  /*!< EPWM2 SYNCO */
#define LL_EPWM_SCOUT_EPWM3_SYNCO         EPWM_SCOUT_CFG_SCOUT_SEL_1                                  /*!< EPWM3 SYNCO */
#define LL_EPWM_SCOUT_EPWM4_SYNCO         (EPWM_SCOUT_CFG_SCOUT_SEL_1 | EPWM_SCOUT_CFG_SCOUT_SEL_0)  /*!< EPWM4 SYNCO */
#define LL_EPWM_SCOUT_EPWM5_SYNCO         EPWM_SCOUT_CFG_SCOUT_SEL_2                                  /*!< EPWM5 SYNCO */
#define LL_EPWM_SCOUT_EPWM6_SYNCO         (EPWM_SCOUT_CFG_SCOUT_SEL_2 | EPWM_SCOUT_CFG_SCOUT_SEL_0)  /*!< EPWM6 SYNCO */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SOCxACTIVE_POLARITY SOCx ACTIVE POLARITY
  * @brief Constants defining the SOCx ACTIVE POLARITY
  * @{
  */
#define LL_EPWM_SOCA_POLARITY_ACTIVE_HIGH  EPWM_ADCOUT_SOCA_POL     /*!< ADCSOCAO output high active */
#define LL_EPWM_SOCA_POLARITY_ACTIVE_LOW   0x00000000U               /*!< ADCSOCAO output low active */
#define LL_EPWM_SOCB_POLARITY_ACTIVE_HIGH  EPWM_ADCOUT_SOCB_POL     /*!< ADCSOCBO output high active */
#define LL_EPWM_SOCB_POLARITY_ACTIVE_LOW   0x00000000U               /*!< ADCSOCBO output low active */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SOC_ENABLE SOC ENABLE
  * @brief Constants defining the SOC ENABLE
  * @{
  */
#define LL_EPWM_EN_SOC1A      EPWM_ADCOUT_SOC1A_EN     /*!< EPWM output SOC1A to ADCSOCAO */
#define LL_EPWM_EN_SOC2A      EPWM_ADCOUT_SOC2A_EN     /*!< EPWM output SOC2A to ADCSOCAO */
#define LL_EPWM_EN_SOC3A      EPWM_ADCOUT_SOC3A_EN     /*!< EPWM output SOC3A to ADCSOCAO */
#define LL_EPWM_EN_SOC4A      EPWM_ADCOUT_SOC4A_EN     /*!< EPWM output SOC4A to ADCSOCAO */
#define LL_EPWM_EN_SOC5A      EPWM_ADCOUT_SOC5A_EN     /*!< EPWM output SOC5A to ADCSOCAO */
#define LL_EPWM_EN_SOC6A      EPWM_ADCOUT_SOC6A_EN     /*!< EPWM output SOC6A to ADCSOCAO */
#define LL_EPWM_EN_SOC1B      EPWM_ADCOUT_SOC1B_EN     /*!< EPWM output SOC1B to ADCSOCBO */
#define LL_EPWM_EN_SOC2B      EPWM_ADCOUT_SOC2B_EN     /*!< EPWM output SOC2B to ADCSOCBO */
#define LL_EPWM_EN_SOC3B      EPWM_ADCOUT_SOC3B_EN     /*!< EPWM output SOC3B to ADCSOCBO */
#define LL_EPWM_EN_SOC4B      EPWM_ADCOUT_SOC4B_EN     /*!< EPWM output SOC4B to ADCSOCBO */
#define LL_EPWM_EN_SOC5B      EPWM_ADCOUT_SOC5B_EN     /*!< EPWM output SOC5B to ADCSOCBO */
#define LL_EPWM_EN_SOC6B      EPWM_ADCOUT_SOC6B_EN     /*!< EPWM output SOC6B to ADCSOCBO */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_SYNCI_SEL SYNCI SEL
  * @brief Constants defining the SYNCI SEL
  * @{
  */
#define LL_EPWM_SYNC_SEL1    0x00000000U     /*!< SYNC source is EPWM1*/
#define LL_EPWM_SYNC_SEL2    0x00000001U     /*!< SYNC source is EPWM2*/
#define LL_EPWM_SYNC_SEL3    0x00000002U     /*!< SYNC source is EPWM3*/
#define LL_EPWM_SYNC_SEL4    0x00000003U     /*!< SYNC source is EPWM4*/
#define LL_EPWM_SYNC_SEL5    0x00000004U     /*!< SYNC source is EPWM5*/
#define LL_EPWM_SYNC_SEL6    0x00000005U     /*!< SYNC source is EPWM6*/
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_HXB_POL EPWM XBAR POLARITY
  * @brief Constants defining the EPWM XBAR POLARITY
  * @{
  */
#define LL_EPWM_POL_HXB4       EPWM_HXB_POL_HXB4P_Pos      /*!< EPWM XBAR4 Polarity */
#define LL_EPWM_POL_HXB5       EPWM_HXB_POL_HXB5P_Pos      /*!< EPWM XBAR5 Polarity */
#define LL_EPWM_POL_HXB7       EPWM_HXB_POL_HXB7P_Pos      /*!< EPWM XBAR7 Polarity */
#define LL_EPWM_POL_HXB8       EPWM_HXB_POL_HXB8P_Pos      /*!< EPWM XBAR8 Polarity */
#define LL_EPWM_POL_HXB9       EPWM_HXB_POL_HXB9P_Pos      /*!< EPWM XBAR9 Polarity */
#define LL_EPWM_POL_HXB10      EPWM_HXB_POL_HXB10P_Pos     /*!< EPWM XBAR10 Polarity */
#define LL_EPWM_POL_HXB11      EPWM_HXB_POL_HXB11P_Pos     /*!< EPWM XBAR11 Polarity */
#define LL_EPWM_POL_HXB12      EPWM_HXB_POL_HXB12P_Pos     /*!< EPWM XBAR12 Polarity */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_HXBActive_POL EPWM XBAR Active POLARITY
  * @brief Constants defining the EPWM XBAR Active POLARITY
  * @{
  */
#define LL_EPWM_HXB_POLARITY_ACTIVE_HIGH       0x00000000U             /*!< EPWM XBAR output high active */
#define LL_EPWM_HXB_POLARITY_ACTIVE_LOW        EPWM_HXB_POL_HXB4P     /*!< EPWM XBAR output high active */
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_HXB_NUM HXB number
  * @brief Constants defining the HXB number
  * @{
  */
#define LL_EPWM_MUX_HXB4        0x00000000U            /*!< EPWM XBAR4 output source*/
#define LL_EPWM_MUX_HXB5        0x00000001U            /*!< EPWM XBAR5 output source*/
#define LL_EPWM_MUX_HXB7        0x00000002U            /*!< EPWM XBAR7 output source*/
#define LL_EPWM_MUX_HXB8        0x00000003U            /*!< EPWM XBAR8 output source*/
#define LL_EPWM_MUX_HXB9        0x00000004U            /*!< EPWM XBAR9 output source*/
#define LL_EPWM_MUX_HXB10       0x00000005U            /*!< EPWM XBAR10 output source*/
#define LL_EPWM_MUX_HXB11       0x00000006U            /*!< EPWM XBAR11 output source*/
#define LL_EPWM_MUX_HXB12       0x00000007U            /*!< EPWM XBAR12 output source*/
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_HXBMUX_NUM HXB MUX number
  * @brief Constants defining the HXB MUX number
  * @{
  */
#define LL_EPWM_HXB_MUX0           EPWM_HXB4_0_MUX0_Pos
#define LL_EPWM_HXB_MUX1           EPWM_HXB4_0_MUX1_Pos
#define LL_EPWM_HXB_MUX2           EPWM_HXB4_0_MUX2_Pos
#define LL_EPWM_HXB_MUX3           EPWM_HXB4_0_MUX3_Pos
#define LL_EPWM_HXB_MUX4           EPWM_HXB4_0_MUX4_Pos
#define LL_EPWM_HXB_MUX5           EPWM_HXB4_0_MUX5_Pos
#define LL_EPWM_HXB_MUX6           EPWM_HXB4_0_MUX6_Pos
#define LL_EPWM_HXB_MUX7           EPWM_HXB4_0_MUX7_Pos
#define LL_EPWM_HXB_MUX8           EPWM_HXB4_0_MUX8_Pos
#define LL_EPWM_HXB_MUX9           EPWM_HXB4_0_MUX9_Pos
#define LL_EPWM_HXB_MUX10          EPWM_HXB4_0_MUX10_Pos
#define LL_EPWM_HXB_MUX11          EPWM_HXB4_0_MUX11_Pos
#define LL_EPWM_HXB_MUX12          EPWM_HXB4_0_MUX12_Pos
#define LL_EPWM_HXB_MUX13          EPWM_HXB4_0_MUX13_Pos
#define LL_EPWM_HXB_MUX14          EPWM_HXB4_0_MUX14_Pos
#define LL_EPWM_HXB_MUX15          EPWM_HXB4_0_MUX15_Pos
#define LL_EPWM_HXB_MUX16          (EPWM_HXB4_1_MUX16_Pos + 1U)
#define LL_EPWM_HXB_MUX17          (EPWM_HXB4_1_MUX17_Pos + 1U)
#define LL_EPWM_HXB_MUX18          (EPWM_HXB4_1_MUX18_Pos + 1U)
#define LL_EPWM_HXB_MUX19          (EPWM_HXB4_1_MUX19_Pos + 1U)
#define LL_EPWM_HXB_MUX20          (EPWM_HXB4_1_MUX20_Pos + 1U)
#define LL_EPWM_HXB_MUX21          (EPWM_HXB4_1_MUX21_Pos + 1U)
#define LL_EPWM_HXB_MUX22          (EPWM_HXB4_1_MUX22_Pos + 1U)
#define LL_EPWM_HXB_MUX23          (EPWM_HXB4_1_MUX23_Pos + 1U)
#define LL_EPWM_HXB_MUX24          (EPWM_HXB4_1_MUX24_Pos + 1U)
#define LL_EPWM_HXB_MUX25          (EPWM_HXB4_1_MUX25_Pos + 1U)
#define LL_EPWM_HXB_MUX26          (EPWM_HXB4_1_MUX26_Pos + 1U)
#define LL_EPWM_HXB_MUX27          (EPWM_HXB4_1_MUX27_Pos + 1U)
#define LL_EPWM_HXB_MUX28          (EPWM_HXB4_1_MUX28_Pos + 1U)
#define LL_EPWM_HXB_MUX29          (EPWM_HXB4_1_MUX29_Pos + 1U)
#define LL_EPWM_HXB_MUX30          (EPWM_HXB4_1_MUX30_Pos + 1U)
#define LL_EPWM_HXB_MUX31          (EPWM_HXB4_1_MUX31_Pos + 1U)
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_HXBMUX_SEL HXB MUX SEL
  * @brief Constants defining the HXB MUX SEL
  * @{
  */
#define LL_EPWM_HXB_MUX_SEL0         0x00000000U
#define LL_EPWM_HXB_MUX_SEL1         EPWM_HXB4_0_MUX0_0
#define LL_EPWM_HXB_MUX_SEL2         EPWM_HXB4_0_MUX0_1
#define LL_EPWM_HXB_MUX_SEL3         (EPWM_HXB4_0_MUX0_1 | EPWM_HXB4_0_MUX0_0)
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_IXB_SEL IXB SEL
  * @brief Constants defining the IXB SEL
  * @{
  */
#define LL_EPWM_PRD_IXB0_7       EPWM_IXBCTRL_ISAPRD0_Pos
#define LL_EPWM_PRD_IXB8_14      EPWM_IXBCTRL_ISAPRD1_Pos
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_IXBLOCK_SEL IXB LOCK SEL
  * @brief Constants defining the IXB LOCK SEL
  * @{
  */
#define LL_EPWM_IXB_LOCK1           EPWM_IXBSEL_LOCK_INPUTLOCK1
#define LL_EPWM_IXB_LOCK2           EPWM_IXBSEL_LOCK_INPUTLOCK2
#define LL_EPWM_IXB_LOCK3           EPWM_IXBSEL_LOCK_INPUTLOCK3
#define LL_EPWM_IXB_LOCK4           EPWM_IXBSEL_LOCK_INPUTLOCK4
#define LL_EPWM_IXB_LOCK5           EPWM_IXBSEL_LOCK_INPUTLOCK5
#define LL_EPWM_IXB_LOCK6           EPWM_IXBSEL_LOCK_INPUTLOCK6
#define LL_EPWM_IXB_LOCK7           EPWM_IXBSEL_LOCK_INPUTLOCK7
#define LL_EPWM_IXB_LOCK8           EPWM_IXBSEL_LOCK_INPUTLOCK8
#define LL_EPWM_IXB_LOCK9           EPWM_IXBSEL_LOCK_INPUTLOCK9
#define LL_EPWM_IXB_LOCK10          EPWM_IXBSEL_LOCK_INPUTLOCK10
#define LL_EPWM_IXB_LOCK11          EPWM_IXBSEL_LOCK_INPUTLOCK11
#define LL_EPWM_IXB_LOCK12          EPWM_IXBSEL_LOCK_INPUTLOCK12
#define LL_EPWM_IXB_LOCK13          EPWM_IXBSEL_LOCK_INPUTLOCK13
#define LL_EPWM_IXB_LOCK14          EPWM_IXBSEL_LOCK_INPUTLOCK14
#define LL_EPWM_IXB_FILTERLOCK      EPWM_IXBSEL_LOCK_FILTERLOCK
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_IXBAQ_SEL IXB AQ SEL
  * @brief Constants defining the IXB AQ SEL
  * @{
  */
#define LL_EPWM_IXB_AQSEL1           EPWM_IXBAQSEL_AQSEL1_Pos
#define LL_EPWM_IXB_AQSEL2           EPWM_IXBAQSEL_AQSEL2_Pos
#define LL_EPWM_IXB_AQSEL3           EPWM_IXBAQSEL_AQSEL3_Pos
#define LL_EPWM_IXB_AQSEL4           EPWM_IXBAQSEL_AQSEL4_Pos
#define LL_EPWM_IXB_AQSEL5           EPWM_IXBAQSEL_AQSEL5_Pos
#define LL_EPWM_IXB_AQSEL6           EPWM_IXBAQSEL_AQSEL6_Pos
#define LL_EPWM_IXB_AQSEL7           EPWM_IXBAQSEL_AQSEL7_Pos
#define LL_EPWM_IXB_AQSEL8           EPWM_IXBAQSEL_AQSEL8_Pos
#define LL_EPWM_IXB_AQSEL9           EPWM_IXBAQSEL_AQSEL9_Pos
#define LL_EPWM_IXB_AQSEL10          EPWM_IXBAQSEL_AQSEL10_Pos
#define LL_EPWM_IXB_AQSEL11          EPWM_IXBAQSEL_AQSEL11_Pos
#define LL_EPWM_IXB_AQSEL12          EPWM_IXBAQSEL_AQSEL12_Pos
#define LL_EPWM_IXB_AQSEL13          EPWM_IXBAQSEL_AQSEL13_Pos
#define LL_EPWM_IXB_AQSEL14          EPWM_IXBAQSEL_AQSEL14_Pos
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_IXBAQ_Mode IXB AQ Mode
  * @brief Constants defining the IXB AQ Mode
  * @{
  */
#define LL_EPWM_IXB_AQSEL_SYNC       0x00000000U
#define LL_EPWM_IXB_AQSEL_SAMP3      EPWM_IXBAQSEL_AQSEL1_0
#define LL_EPWM_IXB_AQSEL_SAMP6      EPWM_IXBAQSEL_AQSEL1_1
#define LL_EPWM_IXB_AQSEL_ASYNC      (EPWM_IXBAQSEL_AQSEL1_1 | EPWM_IXBAQSEL_AQSEL1_0)
/**
  * @}
  */

/** @defgroup EPWM_LL_EC_IXBARINPUT_SEL IXBAR SEL
  * @brief Constants defining the IXBAR INPUT SEL
  * @{
  */
#define LL_EPWM_IXBAR_INPUTSEL1           0x00000000U
#define LL_EPWM_IXBAR_INPUTSEL2           0x00000001U
#define LL_EPWM_IXBAR_INPUTSEL3           0x00000002U
#define LL_EPWM_IXBAR_INPUTSEL4           0x00000003U
#define LL_EPWM_IXBAR_INPUTSEL5           0x00000004U
#define LL_EPWM_IXBAR_INPUTSEL6           0x00000005U
#define LL_EPWM_IXBAR_INPUTSEL7           0x00000006U
#define LL_EPWM_IXBAR_INPUTSEL8           0x00000007U
#define LL_EPWM_IXBAR_INPUTSEL9           0x00000008U
#define LL_EPWM_IXBAR_INPUTSEL10          0x00000009U
#define LL_EPWM_IXBAR_INPUTSEL11          0x0000000AU
#define LL_EPWM_IXBAR_INPUTSEL12          0x0000000BU
#define LL_EPWM_IXBAR_INPUTSEL13          0x0000000CU
#define LL_EPWM_IXBAR_INPUTSEL14          0x0000000DU
/**
  * @}
  */
  
/**
  * @}
  */

/* Exported macro ------------------------------------------------------------*/
/** @defgroup EPWM_LL_Exported_Macros EPWM Exported Macros
  * @{
  */

/**
  * @}
  */

/* Exported functions --------------------------------------------------------*/
/** @defgroup EPWM_LL_Exported_Functions EPWM Exported Functions
  * @{
  */

/** @defgroup EPWM_LL_EF_Time_Base Time Base configuration
  * @{
  */

/**
  * @brief  Set the time base count
  * @rmtoll TBCTR          TBCTR           LL_EPWM_SetCounter
  * @param  EPWMx EPWM instance
  * @param  Count time base count value
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCounter(EPWM_TypeDef *EPWMx, uint16_t Count)
{
  WRITE_REG(EPWMx->TBCTR, Count);
}

/**
  * @brief  Returns time base counter value.
  * @rmtoll TBCTR          TBCTR           LL_EPWM_GetCounter
  * @param  EPWMx EPWM instance
  * @retval Base counter value
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCounter(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TBCTR));
}

/**
  * @brief  Set count mode after phase shift sync
  * @note This function sets the time base count to count up or down after a new
  *       phase value set by the LL_EPWM_SetPhaseShift().
  * @rmtoll TBCTL          PHSDIR           LL_EPWM_SetCountModeAfterSync
  * @param  EPWMx EPWM instance
  * @param  Mode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_COUNT_MODE_UP_AFTER_SYNC
  *         @arg @ref LL_EPWM_COUNT_MODE_DOWN_AFTER_SYNC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCountModeAfterSync(EPWM_TypeDef *EPWMx, uint16_t Mode)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_PHSDIR, Mode);
}

/**
  * @brief  Get count mode after phase shift sync
  * @rmtoll TBCTL          PHSDIR           LL_EPWM_GetCountModeAfterSync
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_COUNT_MODE_UP_AFTER_SYNC
  *         @arg @ref LL_EPWM_COUNT_MODE_DOWN_AFTER_SYNC
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCountModeAfterSync(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->TBCTL, EPWM_TBCTL_PHSDIR));
}

/**
  * @brief  Set the time base clock and the high speed time base clock count pre-scaler
  * @note This function sets the pre scaler(divider)value for the time base clock
  *       counter and the high speed time base clock counter.
  * @note The equation for the output clock is: TBCLK = EPWMCLK/(highSpeedPrescaler * pre-scaler)
  *       EPWMCLK is a scaled version of SYSCLK. At reset EPWMCLK is half SYSCLK.
  * @rmtoll TBCTL          CLKDIV           LL_EPWM_SetClockPrescaler\n
  *         TBCTL          HSPCLKDIV        LL_EPWM_SetClockPrescaler
  * @param  EPWMx EPWM instance
  * @param  Prescaler This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_1
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_2
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_4
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_8
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_16
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_32
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_64
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_128
  * @param  HighSpeedPrescaler This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_1
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_2
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_4
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_6
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_8
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_10
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_12
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_14
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetClockPrescaler(EPWM_TypeDef *EPWMx, uint16_t Prescaler, uint16_t HighSpeedPrescaler)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_CLKDIV | EPWM_TBCTL_HSPCLKDIV, Prescaler | HighSpeedPrescaler);
}

/**
  * @brief  Get the time base clock and the high speed time base clock count pre-scaler
  * @rmtoll TBCTL          CLKDIV           LL_EPWM_GetClockPrescaler\n
  *         TBCTL          HSPCLKDIV        LL_EPWM_GetClockPrescaler
  * @param  EPWMx EPWM instance
  * @retval Returned value can be combination of the following values:
  *         Prescaler This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_1
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_2
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_4
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_8
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_16
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_32
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_64
  *         @arg @ref LL_EPWM_CLOCK_DIVIDER_128
  *         HighSpeedPrescaler This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_1
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_2
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_4
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_6
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_8
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_10
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_12
  *         @arg @ref LL_EPWM_HSCLOCK_DIVIDER_14
  */
__STATIC_INLINE uint16_t LL_EPWM_GetClockPrescaler(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TBCTL) & (EPWM_TBCTL_CLKDIV | EPWM_TBCTL_HSPCLKDIV));
}

/**
  * @brief  Force a software sync pulse
  * @rmtoll TBCTL          SWFSYNC           LL_EPWM_ForceSyncPulse
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ForceSyncPulse(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBCTL, EPWM_TBCTL_SWFSYNC);
}

/**
  * @brief  Set up the sync out pulse event
  * @rmtoll TBCTL          SYNCOSEL           LL_EPWM_SetSyncOutPulseMode\n
  *         TBCTL2         SYNCOSELX          LL_EPWM_SetSyncOutPulseMode
  * @param  EPWMx EPWM instance
  * @param  Mode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_SOFTWARE
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_D
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_DISABLED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSyncOutPulseMode(EPWM_TypeDef *EPWMx, uint16_t Mode)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_SYNCOSEL, (Mode & EPWM_TBCTL_SYNCOSEL));
  MODIFY_REG(EPWMx->TBCTL2, EPWM_TBCTL2_SYNCOSELX, (Mode & EPWM_TBCTL2_SYNCOSELX));
}

/**
  * @brief  Get the sync out pulse event
  * @rmtoll TBCTL          SYNCOSEL           LL_EPWM_GetSyncOutPulseMode\n
  *         TBCTL2         SYNCOSELX          LL_EPWM_GetSyncOutPulseMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_SOFTWARE
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_B
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_C
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_ON_CNTR_COMPARE_D
  *         @arg @ref LL_EPWM_SYNC_OUT_PULSE_DISABLED
  */
__STATIC_INLINE uint16_t LL_EPWM_GetSyncOutPulseMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->TBCTL) & EPWM_TBCTL_SYNCOSEL) | (READ_REG(EPWMx->TBCTL2) & EPWM_TBCTL2_SYNCOSELX));
}

/**
  * @brief  Set PWM period load mode.
  * @note This function sets the load mode for the PWM period. If loadMode is set to
  *       LL_EPWM_PERIOD_SHADOW_LOAD, a write or read to the TBPRD (PWM Period count
  *       register) accesses the shadow register. If loadMode is set to
  *       LL_EPWM_PERIOD_DIRECT_LOAD, a write or read to the TBPRD register accesses the
  *       register directly.
  * @rmtoll TBCTL          PRDLD           LL_EPWM_SetPeriodLoadMode
  * @param  EPWMx EPWM instance
  * @param  LoadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_PERIOD_SHADOW_LOAD
  *         @arg @ref LL_EPWM_PERIOD_DIRECT_LOAD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetPeriodLoadMode(EPWM_TypeDef *EPWMx, uint16_t LoadMode)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_PRDLD, LoadMode);
}

/**
  * @brief  Get PWM period load mode.
  * @rmtoll TBCTL          PRDLD           LL_EPWM_GetPeriodLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_PERIOD_SHADOW_LOAD
  *         @arg @ref LL_EPWM_PERIOD_DIRECT_LOAD
  */
__STATIC_INLINE uint16_t LL_EPWM_GetPeriodLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->TBCTL, EPWM_TBCTL_PRDLD));
}

/**
  * @brief  Enable phase shift load
  * @rmtoll TBCTL          PHSEN           LL_EPWM_EnablePhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnablePhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBCTL, EPWM_TBCTL_PHSEN);
}

/**
  * @brief  Disable phase shift load
  * @rmtoll TBCTL          PHSEN           LL_EPWM_DisablePhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisablePhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TBCTL, EPWM_TBCTL_PHSEN);
}

/**
  * @brief  Indicates whether phase shift load is enabled.
  * @rmtoll TBCTL          PHSEN          LL_EPWM_IsEnabledPhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledPhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TBCTL, EPWM_TBCTL_PHSEN) == (EPWM_TBCTL_PHSEN)) ? 1UL : 0UL);
}

/**
  * @brief  Set time base counter mode
  * @rmtoll TBCTL          CTRMODE           LL_EPWM_SetCounterMode
  * @param  EPWMx EPWM instance
  * @param  CounterMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CNTR_MODE_UP
  *         @arg @ref LL_EPWM_CNTR_MODE_DOWN
  *         @arg @ref LL_EPWM_CNTR_MODE_UP_DOWN
  *         @arg @ref LL_EPWM_CNTR_MODE_STOP_FREEZE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCounterMode(EPWM_TypeDef *EPWMx, uint16_t CounterMode)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_CTRMODE, CounterMode);
}

/**
  * @brief  Get time base counter mode
  * @rmtoll TBCTL          CTRMODE           LL_EPWM_GetCounterMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_CNTR_MODE_UP
  *         @arg @ref LL_EPWM_CNTR_MODE_DOWN
  *         @arg @ref LL_EPWM_CNTR_MODE_UP_DOWN
  *         @arg @ref LL_EPWM_CNTR_MODE_STOP_FREEZE
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCounterMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->TBCTL, EPWM_TBCTL_CTRMODE));
}

/**
  * @brief  Set shadow to active period load on sync mode
  * @rmtoll TBCTL2          PRDLDSYNC           LL_EPWM_SetPeriodLoadEvent
  * @param  EPWMx EPWM instance
  * @param  ShadowLoadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_CNTR_ZERO
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_CNTR_SYNC
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_SYNC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetPeriodLoadEvent(EPWM_TypeDef *EPWMx, uint16_t ShadowLoadMode)
{
  MODIFY_REG(EPWMx->TBCTL2, EPWM_TBCTL2_PRDLDSYNC, ShadowLoadMode);
}

/**
  * @brief  Get shadow to active period load on sync mode
  * @rmtoll TBCTL2          PRDLDSYNC           LL_EPWM_GetPeriodLoadEvent
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_CNTR_ZERO
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_CNTR_SYNC
  *         @arg @ref LL_EPWM_SHADOW_LOAD_MODE_SYNC
  */
__STATIC_INLINE uint16_t LL_EPWM_GetPeriodLoadEvent(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->TBCTL2, EPWM_TBCTL2_PRDLDSYNC));
}

/**
  * @brief  Enable one shot sync mode
  * @rmtoll TBCTL2          OSHTSYNCMODE           LL_EPWM_EnableOneShotSync
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableOneShotSync(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBCTL2, EPWM_TBCTL2_OSHTSYNCMODE);
}

/**
  * @brief  Disable one shot sync mode
  * @rmtoll TBCTL2          OSHTSYNCMODE           LL_EPWM_DisableOneShotSync
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableOneShotSync(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TBCTL2, EPWM_TBCTL2_OSHTSYNCMODE);
}

/**
  * @brief  Indicates whether one shot sync mode is enabled.
  * @rmtoll TBCTL2          OSHTSYNCMODE           LL_EPWM_IsEnabledOneShotSync
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledOneShotSync(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TBCTL2, EPWM_TBCTL2_OSHTSYNCMODE) == (EPWM_TBCTL2_OSHTSYNCMODE)) ? 1UL : 0UL);
}

/**
  * @brief  Start one shot sync mode
  * @rmtoll TBCTL2          OSHTSYNC           LL_EPWM_StartOneShotSync
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_StartOneShotSync(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBCTL2, EPWM_TBCTL2_OSHTSYNC);
}

/**
  * @brief  Indicate whether time base counter overflow (CTRMAX).
  * @rmtoll TBSTS           CTRMAX           LL_EPWM_IsActiveFlag_CTRMAX
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_CTRMAX(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TBSTS, EPWM_TBSTS_CTRMAX) == (EPWM_TBSTS_CTRMAX)) ? 1UL : 0UL);
}

/**
  * @brief  Clear max time base counter event flag (CTRMAX).
  * @rmtoll TBSTS           CTRMAX         LL_EPWM_ClearFlag_CTRMAX
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearFlag_CTRMAX(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBSTS, EPWM_TBSTS_CTRMAX);
}

/**
  * @brief  Indicate whether external sync signal flag (SYNCI) is set.
  * @rmtoll TBSTS           SYNCI           LL_EPWM_IsActiveFlag_SYNCI
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SYNCI(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TBSTS, EPWM_TBSTS_SYNCI) == (EPWM_TBSTS_SYNCI)) ? 1UL : 0UL);
}

/**
  * @brief  Clear external sync signal event flag (SYNCI).
  * @rmtoll TBSTS           SYNCI         LL_EPWM_ClearFlag_SYNCI
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearFlag_SYNCI(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TBSTS, EPWM_TBSTS_SYNCI);
}

/**
  * @brief  Return time base counter direction.
  * @rmtoll TBSTS          CTRDIR           LL_EPWM_GetCounterDirection
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TIME_BASE_STATUS_COUNT_UP
  *         @arg @ref LL_EPWM_TIME_BASE_STATUS_COUNT_DOWN
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCounterDirection(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->TBSTS, EPWM_TBSTS_CTRDIR));
}

/**
  * @brief  Sets the phase shift offset counter value.
  * @note This function sets the 16 bit time-base counter phase of the EPWM relative
  *       to the time-base that is supplying the synchronization input signal. Call
  *       the LL_EPWM_EnablePhaseShiftLoad() function to enable loading of the
  *       phaseCount phase shift value when a sync event occurs.
  * @rmtoll TBPHS          TBPHS           LL_EPWM_SetPhaseShift
  * @param  EPWMx EPWM instance
  * @param  PhaseCount phase shift count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetPhaseShift(EPWM_TypeDef *EPWMx, uint16_t PhaseCount)
{
  MODIFY_REG(EPWMx->TBPHS, EPWM_TBPHS_TBPHS, ((uint32_t)PhaseCount << EPWM_TBPHS_TBPHS_Pos));
}

/**
  * @brief  Gets the phase shift offset counter value.
  * @rmtoll TBPHS          TBPHS           LL_EPWM_GetPhaseShift
  * @param  EPWMx EPWM instance
  * @retval phase shift count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetPhaseShift(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->TBPHS) & EPWM_TBPHS_TBPHS) >> EPWM_TBPHS_TBPHS_Pos);
}

/**
  * @brief  Sets the PWM period count.
  * @note This function sets the period of the PWM count. The value of periodCount is
  *       the value written to the register. User should map the desired period or
  *       frequency of the waveform into the correct periodCount.
  * @note Invoke the function LL_EPWM_selectPeriodLoadEvent() with the appropriate
  *       parameter to set the load mode of the Period count. periodCount has a
  *       maximum valid value of 0xFFFF
  * @rmtoll TBPRD          TBPRD           LL_EPWM_SetPeriod
  * @param  EPWMx EPWM instance
  * @param  PeriodCount period count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetPeriod(EPWM_TypeDef *EPWMx, uint16_t PeriodCount)
{
  WRITE_REG(EPWMx->TBPRD, PeriodCount);
}

/**
  * @brief  Gets the PWM period count.
  * @rmtoll TBPRD          TBPRD           LL_EPWM_GetPeriod
  * @param  EPWMx EPWM instance
  * @retval The period count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetPeriod(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TBPRD));
}

/**
  * @brief  Sets the EPWM links.
  * @note This function links the component defined in linkComp in the current EPWM
  *       instance with the linkComp component of the EPWM instance defined by
  *       epwmLink. A change (a write) in the value of linkComp component of epwmLink
  *       instance, causes a change in the current EPWM linkComp component.
  * @note For example if the current EPWM is EPWM3 and the values of epwmLink and
  *       linkComp are LL_EPWM_LINK_WITH_EPWM_1 and LL_EPWM_LINK_COMP_C respectively,
  *       then a write to COMPC register in EPWM1, will result in a simultaneous
  *       write to COMPC register in EPWM3.
  * @rmtoll XLINK          TBPRDLINK           LL_EPWM_ConfigLinks\n
  *         XLINK          CMPALINK            LL_EPWM_ConfigLinks\n
  *         XLINK          CMPBLINK            LL_EPWM_ConfigLinks\n
  *         XLINK          CMPCLINK            LL_EPWM_ConfigLinks\n
  *         XLINK          CMPDLINK            LL_EPWM_ConfigLinks\n
  *         XLINK          GLDCTL2LINK         LL_EPWM_ConfigLinks
  * @param  EPWMx EPWM instance
  * @param  epwmLink This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_1
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_2
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_3
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_4
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_5
  *         @arg @ref LL_EPWM_LINK_WITH_EPWM_6
  * @param  linkComp This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_LINK_TBPRD
  *         @arg @ref LL_EPWM_LINK_COMP_A
  *         @arg @ref LL_EPWM_LINK_COMP_B
  *         @arg @ref LL_EPWM_LINK_COMP_C
  *         @arg @ref LL_EPWM_LINK_COMP_D
  *         @arg @ref LL_EPWM_LINK_GLDCTL2
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ConfigLinks(EPWM_TypeDef *EPWMx, uint32_t epwmLink, uint32_t linkComp)
{
  MODIFY_REG(EPWMx->XLINK, (uint32_t)EPWM_XLINK_TBPRDLINK << (uint32_t)linkComp, ((uint32_t)epwmLink << (uint32_t)linkComp));
}

/**
  * @brief  Sets up the Counter Compare shadow load mode
  * @rmtoll CMPCTL          LOADAMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL          LOADBMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL          SHDWAMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL          SHDWBMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL          LOADASYNC            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL          LOADBSYNC            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         LOADCMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         LOADDMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         SHDWCMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         SHDWDMODE            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         LOADCSYNC            LL_EPWM_CC_ConfigShadowLoadMode\n
  *         CMPCTL2         LOADDSYNC            LL_EPWM_CC_ConfigShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  compModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CNTR_COMPARE_A
  *         @arg @ref LL_EPWM_CNTR_COMPARE_B
  *         @arg @ref LL_EPWM_CNTR_COMPARE_C
  *         @arg @ref LL_EPWM_CNTR_COMPARE_D
  * @param  loadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_COMP_LOAD_FREEZE
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_ZERO
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_PERIOD
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_SYNC_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_COMP_LOAD_ON_SYNC_ONLY
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_CC_ConfigShadowLoadMode(EPWM_TypeDef *EPWMx, uint32_t compModule, uint16_t loadMode)
{
  uint8_t isBDGroup = (compModule & 0x01);
  
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->CMPCTL) + OFFSET_TAB_CMPCTLx[compModule]));
  MODIFY_REG(*pReg, ((EPWM_CMPCTL_LOADAMODE | EPWM_CMPCTL_LOADASYNC | EPWM_CMPCTL_SHDWAMODE) << (isBDGroup * 2U)), (loadMode << (isBDGroup * 2U)));
}

/**
  * @brief  Disable Counter Compare shadow load mode
  * @rmtoll CMPCTL          SHDWAMODE            LL_EPWM_CC_DisableShadowLoadMode\n
  *         CMPCTL          SHDWBMODE            LL_EPWM_CC_DisableShadowLoadMode\n
  *         CMPCTL2         SHDWCMODE            LL_EPWM_CC_DisableShadowLoadMode\n
  *         CMPCTL2         SHDWDMODE            LL_EPWM_CC_DisableShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  compModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CNTR_COMPARE_A
  *         @arg @ref LL_EPWM_CNTR_COMPARE_B
  *         @arg @ref LL_EPWM_CNTR_COMPARE_C
  *         @arg @ref LL_EPWM_CNTR_COMPARE_D
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_CC_DisableShadowLoadMode(EPWM_TypeDef *EPWMx, uint32_t compModule)
{
  uint8_t isBDGroup = (compModule & 0x01);
  
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->CMPCTL) + OFFSET_TAB_CMPCTLx[compModule]));
  SET_BIT(*pReg,(EPWM_CMPCTL_SHDWAMODE << (isBDGroup * 2U)));
}

/**
  * @brief  Set counter compare A values.
  * @note The maximum value for compCount is 0xFFFF.
  * @rmtoll CMPA          CMPA            LL_EPWM_SetCompareA
  * @param  EPWMx EPWM instance
  * @param  compCount The counter compare count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCompareA(EPWM_TypeDef *EPWMx, uint16_t compCount)
{
  MODIFY_REG(EPWMx->CMPA, EPWM_CMPA_CMPA, ((uint32_t)compCount << EPWM_CMPA_CMPA_Pos));
}

/**
  * @brief  Set counter compare B values.
  * @note The maximum value for compCount is 0xFFFF.
  * @rmtoll CMPB          CMPB            LL_EPWM_SetCompareB
  * @param  EPWMx EPWM instance
  * @param  compCount The counter compare count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCompareB(EPWM_TypeDef *EPWMx, uint16_t compCount)
{
  MODIFY_REG(EPWMx->CMPB, EPWM_CMPB_CMPB, ((uint32_t)compCount << EPWM_CMPB_CMPB_Pos));
}

/**
  * @brief  Set counter compare C values.
  * @note The maximum value for compCount is 0xFFFF.
  * @rmtoll CMPC          CMPC            LL_EPWM_SetCompareC
  * @param  EPWMx EPWM instance
  * @param  compCount The counter compare count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCompareC(EPWM_TypeDef *EPWMx, uint16_t compCount)
{
  MODIFY_REG(EPWMx->CMPC, EPWM_CMPC_CMPC, compCount);
}

/**
  * @brief  Set counter compare D values.
  * @note The maximum value for compCount is 0xFFFF.
  * @rmtoll CMPD          CMPD            LL_EPWM_SetCompareD
  * @param  EPWMx EPWM instance
  * @param  compCount The counter compare count value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCompareD(EPWM_TypeDef *EPWMx, uint16_t compCount)
{
  MODIFY_REG(EPWMx->CMPD, EPWM_CMPD_CMPD, compCount);
}

/**
  * @brief  Get counter compare A values.
  * @rmtoll CMPA          CMPA            LL_EPWM_GetCompareA
  * @param  EPWMx EPWM instance
  * @retval The counter compare count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCompareA(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->CMPA) >> EPWM_CMPA_CMPA_Pos);
}

/**
  * @brief  Get counter compare B values.
  * @rmtoll CMPB          CMPB            LL_EPWM_GetCompareB
  * @param  EPWMx EPWM instance
  * @retval The counter compare count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCompareB(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->CMPB) >> EPWM_CMPB_CMPB_Pos);
}

/**
  * @brief  Get counter compare C values.
  * @rmtoll CMPC          CMPC            LL_EPWM_GetCompareC
  * @param  EPWMx EPWM instance
  * @retval The counter compare count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCompareC(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->CMPC));
}

/**
  * @brief  Get counter compare D values.
  * @rmtoll CMPD          CMPD            LL_EPWM_GetCompareD
  * @param  EPWMx EPWM instance
  * @retval The counter compare count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCompareD(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->CMPD));
}

/**
  * @brief  Indicate whether the shadow A register full flag (SHDWAFULL) is
  *         set (counter compare shadow A register full).
  * @rmtoll CMPCTL           SHDWAFULL           LL_EPWM_IsActiveFlag_SHDWAFULL
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SHDWAFULL(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->CMPCTL, EPWM_CMPCTL_SHDWAFULL) == (EPWM_CMPCTL_SHDWAFULL)) ? 1UL : 0UL);
}

/**
  * @brief  Indicate whether the shadow B register full flag (SHDWBFULL) is
  *         set (counter compare shadow B register full).
  * @rmtoll CMPCTL           SHDWBFULL           LL_EPWM_IsActiveFlag_SHDWBFULL
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SHDWBFULL(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->CMPCTL, EPWM_CMPCTL_SHDWBFULL) == (EPWM_CMPCTL_SHDWBFULL)) ? 1UL : 0UL);
}

/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Action_Qualifier Action Qualifier configuration
  * @{
  */
/**
  * @brief  Enable Action Qualifier shadow load mode
  * @rmtoll AQCTL          SHDWAQAMODE          LL_EPWM_AQ_EnableShadowLoadMode\n
  *         AQCTL          SHDWAQBMODE          LL_EPWM_AQ_EnableShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  aqModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_A
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_EnableShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t aqModule)
{
  SET_BIT(EPWMx->AQCTL, EPWM_AQCTL_SHDWAQAMODE << (aqModule * 2U));
}

/**
  * @brief  Disable Action Qualifier shadow load mode
  * @rmtoll AQCTL          SHDWAQAMODE          LL_EPWM_AQ_DisableShadowLoadMode\n
  *         AQCTL          SHDWAQBMODE          LL_EPWM_AQ_DisableShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  aqModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_A
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_DisableShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t aqModule)
{
  CLEAR_BIT(EPWMx->AQCTL, EPWM_AQCTL_SHDWAQAMODE << (aqModule * 2U));
}

/**
  * @brief  Indicates whether Action Qualifier shadow load mode is enabled.
  * @rmtoll AQCTL          SHDWAQAMODE          LL_EPWM_AQ_IsEnabledShadowLoadMode\n
  *         AQCTL          SHDWAQBMODE          LL_EPWM_AQ_IsEnabledShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  aqModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_A
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_AQ_IsEnabledShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t aqModule)
{
  return ((READ_BIT(EPWMx->AQCTL, (EPWM_AQCTL_SHDWAQAMODE << (aqModule * 2U))) == (EPWM_AQCTL_SHDWAQAMODE << (aqModule * 2U))) ? 1UL : 0UL);
}

/**
  * @brief  Sets the Action Qualifier shadow load mode
  * @rmtoll AQCTL          LDAQAMODE            LL_EPWM_AQ_SetShadowLoadMode\n
  *         AQCTL          LDAQBMODE            LL_EPWM_AQ_SetShadowLoadMode\n
  *         AQCTL          SHDWAQAMODE          LL_EPWM_AQ_SetShadowLoadMode\n
  *         AQCTL          SHDWAQBMODE          LL_EPWM_AQ_SetShadowLoadMode\n
  *         AQCTL          LDAQASYNC            LL_EPWM_AQ_SetShadowLoadMode\n
  *         AQCTL          LDAQBSYNC            LL_EPWM_AQ_SetShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  aqModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_A
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_B
  * @param  loadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_FREEZE
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_ONLY
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t aqModule, uint16_t loadMode)
{
  MODIFY_REG(EPWMx->AQCTL, ((EPWM_AQCTL_LDAQAMODE | EPWM_AQCTL_LDAQASYNC) << (aqModule * 2U)),(loadMode << (aqModule * 2U)));
}

/**
  * @brief  Gets the Action Qualifier shadow load mode
  * @rmtoll AQCTL          LDAQAMODE            LL_EPWM_AQ_GetShadowLoadMode\n
  *         AQCTL          LDAQBMODE            LL_EPWM_AQ_GetShadowLoadMode\n
  *         AQCTL          SHDWAQAMODE          LL_EPWM_AQ_GetShadowLoadMode\n
  *         AQCTL          SHDWAQBMODE          LL_EPWM_AQ_GetShadowLoadMode\n
  *         AQCTL          LDAQASYNC            LL_EPWM_AQ_GetShadowLoadMode\n
  *         AQCTL          LDAQBSYNC            LL_EPWM_AQ_GetShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  aqModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_A
  *         @arg @ref LL_EPWM_ACTION_QUALIFIER_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_FREEZE
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_LOAD_ON_SYNC_ONLY
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t aqModule)
{
  return (uint16_t)((READ_REG(EPWMx->AQCTL) & ((EPWM_AQCTL_LDAQAMODE | EPWM_AQCTL_LDAQASYNC) << (aqModule * 2U))) >> (aqModule * 2U));
}

/**
  * @brief  Set up Action qualifier trigger source for event T1
  * @rmtoll AQTSRCSEL          T1SEL            LL_EPWM_AQ_SetT1TriggerSource
  * @param  EPWMx EPWM instance
  * @param  trigger This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_3
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetT1TriggerSource(EPWM_TypeDef *EPWMx, uint16_t trigger)
{
  MODIFY_REG(EPWMx->AQTSRCSEL, EPWM_AQTSRCSEL_T1SEL, (uint16_t)trigger);
}

/**
  * @brief  Get Action qualifier trigger source for event T1
  * @rmtoll AQTSRCSEL          T1SEL            LL_EPWM_AQ_GetT1TriggerSource
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_3
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetT1TriggerSource(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->AQTSRCSEL) & EPWM_AQTSRCSEL_T1SEL);
}

/**
  * @brief  Set up Action qualifier trigger source for event T2
  * @rmtoll AQTSRCSEL          T2SEL            LL_EPWM_AQ_SetT2TriggerSource
  * @param  EPWMx EPWM instance
  * @param  trigger This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_3
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetT2TriggerSource(EPWM_TypeDef *EPWMx, uint16_t trigger)
{
  MODIFY_REG(EPWMx->AQTSRCSEL, EPWM_AQTSRCSEL_T2SEL, (trigger << EPWM_AQTSRCSEL_T2SEL_Pos));
}

/**
  * @brief  Get Action qualifier trigger source for event T2
  * @rmtoll AQTSRCSEL          T2SEL            LL_EPWM_AQ_GetT2TriggerSource
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DCB_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_1
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_2
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_TZ_3
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_EPWM_SYNCIN
  *         @arg @ref LL_EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetT2TriggerSource(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->AQTSRCSEL) & EPWM_AQTSRCSEL_T2SEL) >> EPWM_AQTSRCSEL_T2SEL_Pos);
}

/**
  * @brief  Set up Action qualifier outputs
  * @note This function sets up the Action Qualifier output on EPWMA or EPWMB,
  *       depending on the value of epwmOutput, to a value specified by outPut based
  *       on the input events - specified by event.
  * @rmtoll AQCTLA          ZRO              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA          PRD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA          CAU              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA          CAD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA          CBU              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA          CBD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA2         T1U              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA2         T1D              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA2         T2U              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLA2         T2D              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          ZRO              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          PRD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          CAU              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          CAD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          CBU              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB          CBD              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB2         T1U              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB2         T1D              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB2         T2U              LL_EPWM_AQ_ConfigAction\n
  *         AQCTLB2         T2D              LL_EPWM_AQ_ConfigAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE
  *         @arg @ref LL_EPWM_AQ_OUTPUT_LOW
  *         @arg @ref LL_EPWM_AQ_OUTPUT_HIGH
  *         @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE
  * @param  event This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_PERIOD
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_T1_COUNT_UP
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_T1_COUNT_DOWN
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_T2_COUNT_UP
  *         @arg @ref LL_EPWM_AQ_OUTPUT_ON_T2_COUNT_DOWN
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_ConfigAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput, uint16_t output, uint16_t event)
{
  uint8_t isAQCTLx2 = (event & 0x01);
  
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->AQCTLA) + OFFSET_TAB_AQCTLx[epwmOutput] + isAQCTLx2 * 2U));
  MODIFY_REG(*pReg, (3U << (event - isAQCTLx2)), ((uint16_t)output << (event - isAQCTLx2)));
}

/**
  * @brief  Set up Action qualifier event outputs
  * @note This function sets up the Action Qualifier output on EPWMA or EPWMB,
  *       depending on the value of epwmOutput, to a value specified by action.
  *       Valid action param values from different time base counter scenarios
  *       should be OR'd together to configure complete action for a pwm output.
  * @note A logical OR of the valid values should be passed as the action
  *       parameter. Single action should be configured for each time base
  *       counter scenario.
  * @rmtoll AQCTLA          ZRO              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLA          PRD              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLA          CAU              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLA          CAD              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLA          CBU              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLA          CBD              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          ZRO              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          PRD              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          CAU              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          CAD              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          CBU              LL_EPWM_AQ_ConfigActionComplete\n
  *         AQCTLB          CBD              LL_EPWM_AQ_ConfigActionComplete
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @param  action This parameter can be one of the following values:
  *         - When time base counter equals zero
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_ZERO
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_ZERO
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_ZERO
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_ZERO
  *         - When time base counter equals period
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_PERIOD
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_PERIOD
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_PERIOD
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_PERIOD
  *         - When time base counter equals CMPA during up-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_UP_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_UP_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_UP_CMPA
  *         - When time base counter equals CMPA during down-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_DOWN_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_DOWN_CMPA
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_CMPA
  *         - When time base counter equals CMPB during up-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_UP_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_UP_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_UP_CMPB
  *         - When time base counter equals CMPB during down-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_DOWN_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_DOWN_CMPB
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_CMPB
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_ConfigActionComplete(EPWM_TypeDef *EPWMx, uint32_t epwmOutput, uint16_t action)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->AQCTLA) + OFFSET_TAB_AQCTLx[epwmOutput]));
  WRITE_REG(*pReg,(uint16_t)action);
}

/**
  * @brief  Set up Additional action qualifier event outputs
  * @note This function sets up the Additional Action Qualifier output on EPWMA or
  *       EPWMB depending on the value of epwmOutput, to a value specified by action.
  *       Valid action param values from different event scenarios should be OR'd
  *       together to configure complete action for a pwm output.
  * @note A logical OR of the valid values should be passed as the action
  *       parameter. Single action should be configured for each event
  *       scenario.
  * @rmtoll AQCTLA2         T1U              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLA2         T1D              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLA2         T2U              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLA2         T2D              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLB2         T1U              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLB2         T1D              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLB2         T2U              LL_EPWM_AQ_ConfigAdditionalActionComplete\n
  *         AQCTLB2         T2D              LL_EPWM_AQ_ConfigAdditionalActionComplete
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @param  action This parameter can be one of the following values:
  *         - When T1 event occurs during up-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_UP_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_UP_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_UP_T1
  *         - When T1 event occurs during down-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_DOWN_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_DOWN_T1
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_T1
  *         - When T2 event occurs during up-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_UP_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_UP_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_UP_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_UP_T2
  *         - When T2 event occurs during down-count
  *           @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE_DOWN_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_LOW_DOWN_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_HIGH_DOWN_T2
  *           @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE_DOWN_T2
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_ConfigAdditionalActionComplete(EPWM_TypeDef *EPWMx, uint32_t epwmOutput, uint16_t action)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->AQCTLA2) + OFFSET_TAB_AQCTLx[epwmOutput]));
  WRITE_REG(*pReg,(uint16_t)action);
}

/**
  * @brief  Sets up Action qualifier continuous software load mode.
  * @note This function sets up the AQCFRSC register load mode for continuous
  *       software force reload mode. The software force actions are determined by
  *       the LL_EPWM_AQ_SetContSWForceAction() function.
  * @rmtoll AQSFRC         RLDCSF              LL_EPWM_AQ_SetContSWForceShadowMode
  * @param  EPWMx EPWM instance
  * @param  mode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_SW_IMMEDIATE_LOAD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetContSWForceShadowMode(EPWM_TypeDef *EPWMx, uint16_t mode)
{
  MODIFY_REG(EPWMx->AQSFRC, EPWM_AQSFRC_RLDCSF, mode);
}

/**
  * @brief  Get Action qualifier continuous software load mode.
  * @rmtoll AQSFRC         RLDCSF              LL_EPWM_AQ_GetContSWForceShadowMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_AQ_SW_IMMEDIATE_LOAD
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetContSWForceShadowMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->AQSFRC) & EPWM_AQSFRC_RLDCSF);
}

/**
  * @brief  Triggers a continuous software forced event.
  * @rmtoll AQCSFRC         CSFA              LL_EPWM_AQ_SetContSWForceAction\n
  *         AQCSFRC         CSFB              LL_EPWM_AQ_SetContSWForceAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_SW_DISABLED
  *         @arg @ref LL_EPWM_AQ_SW_OUTPUT_LOW
  *         @arg @ref LL_EPWM_AQ_SW_OUTPUT_HIGH
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetContSWForceAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput, uint16_t output)
{
  MODIFY_REG(EPWMx->AQCSFRC, (EPWM_AQCSFRC_CSFA << (epwmOutput * 2U)), (output << (epwmOutput * 2U)));
}

/**
  * @brief  Get triggers a continuous software forced event.
  * @rmtoll AQCSFRC         CSFA              LL_EPWM_AQ_GetContSWForceAction\n
  *         AQCSFRC         CSFB              LL_EPWM_AQ_GetContSWForceAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_SW_DISABLED
  *         @arg @ref LL_EPWM_AQ_SW_OUTPUT_LOW
  *         @arg @ref LL_EPWM_AQ_SW_OUTPUT_HIGH
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetContSWForceAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput)
{
  return (uint16_t)((READ_REG(EPWMx->AQCSFRC) & (EPWM_AQCSFRC_CSFA << (epwmOutput * 2U))) >> (epwmOutput * 2U));
}

/**
  * @brief  Set up one time software forced Action qualifier outputs
  * @rmtoll AQSFRC         ACTSFA              LL_EPWM_AQ_SetSWAction\n
  *         AQSFRC         ACTSFB              LL_EPWM_AQ_SetSWAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE
  *         @arg @ref LL_EPWM_AQ_OUTPUT_LOW
  *         @arg @ref LL_EPWM_AQ_OUTPUT_HIGH
  *         @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_SetSWAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput, uint16_t output)
{
  MODIFY_REG(EPWMx->AQSFRC, (EPWM_AQSFRC_ACTSFA << (epwmOutput * 3U)), (output << (epwmOutput * 3U)));
}

/**
  * @brief  Get one time software forced Action qualifier outputs
  * @rmtoll AQSFRC         ACTSFA              LL_EPWM_AQ_GetSWAction\n
  *         AQSFRC         ACTSFB              LL_EPWM_AQ_GetSWAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_NO_CHANGE
  *         @arg @ref LL_EPWM_AQ_OUTPUT_LOW
  *         @arg @ref LL_EPWM_AQ_OUTPUT_HIGH
  *         @arg @ref LL_EPWM_AQ_OUTPUT_TOGGLE
  */
__STATIC_INLINE uint16_t LL_EPWM_AQ_GetSWAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput)
{
  return (uint16_t)((READ_REG(EPWMx->AQSFRC) & (EPWM_AQSFRC_ACTSFA << (epwmOutput * 3U))) >> (epwmOutput * 3U));
}

/**
  * @brief  Triggers a one time software forced event on Action qualifier
  * @rmtoll AQSFRC         OTSFA              LL_EPWM_AQ_ForceSWAction\n
  *         AQSFRC         OTSFB              LL_EPWM_AQ_ForceSWAction
  * @param  EPWMx EPWM instance
  * @param  epwmOutput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_AQ_OUTPUT_A
  *         @arg @ref LL_EPWM_AQ_OUTPUT_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_AQ_ForceSWAction(EPWM_TypeDef *EPWMx, uint32_t epwmOutput)
{
  SET_BIT(EPWMx->AQSFRC, (EPWM_AQSFRC_OTSFA << (epwmOutput * 3U)));
}
/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Dead_Band Dead Band configuration
  * @{
  */
/**
  * @brief  Enable Dead Band signal output swap mode.
  * @rmtoll DBCTL         OUTSWAP              LL_EPWM_DB_EnableOutputSwapMode
  * @param  EPWMx EPWM instance
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_OUTPUT_A
  *         @arg @ref LL_EPWM_DB_OUTPUT_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_EnableOutputSwapMode(EPWM_TypeDef *EPWMx, uint16_t output)
{
  SET_BIT(EPWMx->DBCTL, output);
}

/**
  * @brief  Disable Dead Band signal output swap mode.
  * @rmtoll DBCTL         OUTSWAP              LL_EPWM_DB_DisableOutputSwapMode
  * @param  EPWMx EPWM instance
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_OUTPUT_A
  *         @arg @ref LL_EPWM_DB_OUTPUT_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_DisableOutputSwapMode(EPWM_TypeDef *EPWMx, uint16_t output)
{
  CLEAR_BIT(EPWMx->DBCTL, output);
}

/**
  * @brief  Indicates whether Dead Band signal output swap mode is enabled.
  * @rmtoll DBCTL          OUTSWAP          LL_EPWM_DB_IsEnabledOutputSwapMode
  * @param  EPWMx EPWM instance
  * @param  output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_OUTPUT_A
  *         @arg @ref LL_EPWM_DB_OUTPUT_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DB_IsEnabledOutputSwapMode(EPWM_TypeDef *EPWMx, uint16_t output)
{
  return ((READ_BIT(EPWMx->DBCTL, output) == output) ? 1UL : 0UL);
}

/**
  * @brief  Enable Dead Band signal output mode.
  * @rmtoll DBCTL         OUT_MODE              LL_EPWM_DB_EnableDelayMode
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_RED
  *         @arg @ref LL_EPWM_DB_FED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_EnableDelayMode(EPWM_TypeDef *EPWMx, uint16_t delayMode)
{
  SET_BIT(EPWMx->DBCTL, delayMode);
}

/**
  * @brief  Disable Dead Band signal output mode.
  * @rmtoll DBCTL         OUT_MODE              LL_EPWM_DB_DisableDelayMode
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_RED
  *         @arg @ref LL_EPWM_DB_FED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_DisableDelayMode(EPWM_TypeDef *EPWMx, uint16_t delayMode)
{
  CLEAR_BIT(EPWMx->DBCTL, delayMode);
}

/**
  * @brief  Indicates whether Dead Band signal output mode is enabled.
  * @rmtoll DBCTL          OUT_MODE          LL_EPWM_DB_IsEnabledDelayMode
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_RED
  *         @arg @ref LL_EPWM_DB_FED
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DB_IsEnabledDelayMode(EPWM_TypeDef *EPWMx, uint16_t delayMode)
{
  return ((READ_BIT(EPWMx->DBCTL, delayMode) == delayMode) ? 1UL : 0UL);
}

/**
  * @brief  Sets Dead Band delay polarity.
  * @note This function sets up the polarity as determined by the variable polarity
  *       of the Falling Edge or Rising Edge delay depending on the value of
  *       delayMode.
  * @rmtoll DBCTL         POLSEL              LL_EPWM_DB_SetDelayPolarity
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_RED
  *         @arg @ref LL_EPWM_DB_FED
  * @param  polarity This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_DB_POLARITY_ACTIVE_LOW
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetDelayPolarity(EPWM_TypeDef *EPWMx, uint16_t delayMode, uint16_t polarity)
{
  uint8_t isRED = delayMode >> 1U;
  MODIFY_REG(EPWMx->DBCTL, (EPWM_DBCTL_POLSEL_0 << (isRED ^ 1U)), (polarity << (isRED ^ 1U)));
}

/**
  * @brief  Get Dead Band delay polarity.
  * @rmtoll DBCTL         POLSEL              LL_EPWM_DB_GetDelayPolarity
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_RED
  *         @arg @ref LL_EPWM_DB_FED
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_DB_POLARITY_ACTIVE_LOW
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetDelayPolarity(EPWM_TypeDef *EPWMx, uint16_t delayMode)
{
  uint8_t isRED = delayMode >> 1U;
  return (uint16_t)((READ_REG(EPWMx->DBCTL) & (EPWM_DBCTL_POLSEL_0 << (isRED ^ 1U))) >> (isRED ^ 1U));
}

/**
  * @brief Sets Rising Edge Dead Band delay input.
  * @rmtoll DBCTL         IN_MODE              LL_EPWM_DB_SetREDInput
  * @param  EPWMx EPWM instance
  * @param  input This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMA
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMB
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetREDInput(EPWM_TypeDef *EPWMx, uint16_t input)
{
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_IN_MODE_0, input);
}

/**
  * @brief Gets Rising Edge Dead Band delay input.
  * @rmtoll DBCTL         IN_MODE              LL_EPWM_DB_GetREDInput
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMA
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMB
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetREDInput(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_BIT(EPWMx->DBCTL, EPWM_DBCTL_IN_MODE_0));
}

/**
  * @brief Sets Dead Band delay input.
  * @rmtoll DBCTL         IN_MODE              LL_EPWM_DB_SetFEDInput\n
  *         DBCTL         DEDB_MODE            LL_EPWM_DB_SetFEDInput
  * @param  EPWMx EPWM instance
  * @param  input This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMA
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMB
  *         @arg @ref LL_EPWM_DB_INPUT_DB_RED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetFEDInput(EPWM_TypeDef *EPWMx, uint16_t input)
{
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_DEDB_MODE, (input & EPWM_DBCTL_DEDB_MODE));
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_IN_MODE_1, ((input << 1U) & EPWM_DBCTL_IN_MODE_1));
}

/**
  * @brief Gets Dead Band delay input.
  * @rmtoll DBCTL         IN_MODE              LL_EPWM_DB_GetFEDInput\n
  *         DBCTL         DEDB_MODE            LL_EPWM_DB_GetFEDInput
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMA
  *         @arg @ref LL_EPWM_DB_INPUT_EPWMB
  *         @arg @ref LL_EPWM_DB_INPUT_DB_RED
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetFEDInput(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->DBCTL) & EPWM_DBCTL_DEDB_MODE) | ((READ_REG(EPWMx->DBCTL) & EPWM_DBCTL_IN_MODE_1) >> 1U));
}

/**
  * @brief Enable Dead Band control shadow load mode.
  * @rmtoll DBCTL2         SHDWDBCTLMODE            LL_EPWM_DB_EnableControlShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_EnableControlShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DBCTL2, EPWM_DBCTL2_SHDWDBCTLMODE);
}

/**
  * @brief Disable Dead Band control shadow load mode.
  * @rmtoll DBCTL2         SHDWDBCTLMODE            LL_EPWM_DB_DisableControlShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_DisableControlShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DBCTL2, EPWM_DBCTL2_SHDWDBCTLMODE);
}

/**
  * @brief  Indicates whether Dead Band control shadow load mode is enabled.
  * @rmtoll DBCTL2          SHDWDBCTLMODE          LL_EPWM_DB_IsEnabledControlShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DB_IsEnabledControlShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DBCTL2, EPWM_DBCTL2_SHDWDBCTLMODE) == (EPWM_DBCTL2_SHDWDBCTLMODE)) ? 1UL : 0UL);
}

/**
  * @brief Set the Dead Band control shadow load mode.
  * @rmtoll DBCTL2         LOADDBCTLMODE            LL_EPWM_DB_SetControlShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  loadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_DB_LOAD_FREEZE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetControlShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t loadMode)
{
  MODIFY_REG(EPWMx->DBCTL2, EPWM_DBCTL2_LOADDBCTLMODE, loadMode);
}

/**
  * @brief Get the Dead Band control shadow load mode.
  * @rmtoll DBCTL2         LOADDBCTLMODE            LL_EPWM_DB_GetControlShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_DB_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_DB_LOAD_FREEZE
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetControlShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBCTL2) & EPWM_DBCTL2_LOADDBCTLMODE);
}

/**
  * @brief Enable the RED (Rising Edge Delay) shadow load mode.
  * @rmtoll DBCTL         SHDWDBRED_MODE            LL_EPWM_DB_EnableREDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_EnableREDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBRED_MODE);
}

/**
  * @brief Disable the RED (Rising Edge Delay) shadow load mode.
  * @rmtoll DBCTL         SHDWDBRED_MODE            LL_EPWM_DB_DisableREDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_DisableREDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBRED_MODE);
}

/**
  * @brief  Indicates whether the RED (Rising Edge Delay) shadow load mode is enabled.
  * @rmtoll DBCTL          SHDWDBRED_MODE          LL_EPWM_DB_IsEnabledREDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DB_IsEnabledREDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBRED_MODE) == (EPWM_DBCTL_SHDWDBRED_MODE)) ? 1UL : 0UL);
}

/**
  * @brief Set the RED (Rising Edge Delay) shadow load mode.
  * @rmtoll DBCTL         LOADREDMODE            LL_EPWM_DB_SetREDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  loadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_RED_LOAD_FREEZE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetREDShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t loadMode)
{
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_LOADREDMODE, loadMode);
}

/**
  * @brief Get the RED (Rising Edge Delay) shadow load mode.
  * @rmtoll DBCTL         LOADREDMODE            LL_EPWM_DB_GetREDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_RED_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_RED_LOAD_FREEZE
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetREDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBCTL) & EPWM_DBCTL_LOADREDMODE);
}

/**
  * @brief Enable the FED (Falling Edge Delay) shadow load mode.
  * @rmtoll DBCTL         SHDWDBFED_MODE            LL_EPWM_DB_EnableFEDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_EnableFEDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBFED_MODE);
}

/**
  * @brief Disables the FED (Falling Edge Delay) shadow load mode.
  * @rmtoll DBCTL         SHDWDBFED_MODE            LL_EPWM_DB_DisableFEDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_DisableFEDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBFED_MODE);
}

/**
  * @brief  Indicates whether the FED (Falling Edge Delay) shadow load mode is enabled.
  * @rmtoll DBCTL          SHDWDBFED_MODE          LL_EPWM_DB_IsEnabledFEDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DB_IsEnabledFEDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DBCTL, EPWM_DBCTL_SHDWDBFED_MODE) == (EPWM_DBCTL_SHDWDBFED_MODE)) ? 1UL : 0UL);
}

/**
  * @brief Set the FED (Falling Edge Delay) shadow load mode.
  * @rmtoll DBCTL         LOADFEDMODE            LL_EPWM_DB_SetFEDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @param  loadMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_FED_LOAD_FREEZE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetFEDShadowLoadMode(EPWM_TypeDef *EPWMx, uint16_t loadMode)
{
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_LOADFEDMODE, loadMode);
}

/**
  * @brief Get the FED (Falling Edge Delay) shadow load mode.
  * @rmtoll DBCTL         LOADFEDMODE            LL_EPWM_DB_GetFEDShadowLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_FED_LOAD_ON_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_FED_LOAD_FREEZE
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetFEDShadowLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBCTL) & EPWM_DBCTL_LOADFEDMODE);
}

/**
  * @brief Sets Dead Band Counter clock rate.
  * @rmtoll DBCTL         HALFCYCLE            LL_EPWM_DB_SetCounterClock
  * @param  EPWMx EPWM instance
  * @param  clockMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_CNTR_CLOCK_FULL_CYCLE
  *         @arg @ref LL_EPWM_DB_CNTR_CLOCK_HALF_CYCLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetCounterClock(EPWM_TypeDef *EPWMx, uint16_t clockMode)
{
  MODIFY_REG(EPWMx->DBCTL, EPWM_DBCTL_HALFCYCLE, clockMode);
}

/**
  * @brief Gets Dead Band Counter clock rate.
  * @rmtoll DBCTL         HALFCYCLE            LL_EPWM_DB_GetCounterClock
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_CNTR_CLOCK_FULL_CYCLE
  *         @arg @ref LL_EPWM_DB_CNTR_CLOCK_HALF_CYCLE
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetCounterClock(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBCTL) & EPWM_DBCTL_HALFCYCLE);
}

/**
  * @brief  Set EPWM RED count
  * @note This function sets the RED (Rising Edge Delay) count value.
  * @note The value of redCount should be less than 0x4000U.
  * @rmtoll DBRED          DBRED           LL_EPWM_DB_SetREDCount
  * @param  EPWMx EPWM instance
  * @param  redCount the RED(Rising Edge Delay) count.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetREDCount(EPWM_TypeDef *EPWMx, uint16_t redCount)
{
  WRITE_REG(EPWMx->DBRED, redCount);
}

/**
  * @brief  Get EPWM RED count
  * @rmtoll DBRED          DBRED           LL_EPWM_DB_GetREDCount
  * @param  EPWMx EPWM instance
  * @retval the RED(Rising Edge Delay) count.
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetREDCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBRED));
}

/**
  * @brief  Set EPWM FED count
  * @note This function sets the FED (Falling Edge Delay) count value.
  * @note The value of fedCount should be less than 0x4000U.
  * @rmtoll DBFED          DBFED           LL_EPWM_DB_SetFEDCount
  * @param  EPWMx EPWM instance
  * @param  fedCount the FED(Falling Edge Delay) count.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DB_SetFEDCount(EPWM_TypeDef *EPWMx, uint16_t fedCount)
{
  WRITE_REG(EPWMx->DBFED, fedCount);
}

/**
  * @brief  Get EPWM FED count
  * @rmtoll DBFED          DBFED           LL_EPWM_DB_GetFEDCount
  * @param  EPWMx EPWM instance
  * @retval the FED(Falling Edge Delay) count.
  */
__STATIC_INLINE uint16_t LL_EPWM_DB_GetFEDCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBFED));
}
/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Chopper Chopper configuration
  * @{
  */
/**
  * @brief  Enable chopper mode
  * @rmtoll PCCTL          CHPEN           LL_EPWM_PC_EnableChopper
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_PC_EnableChopper(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->PCCTL, EPWM_PCCTL_CHPEN);
}

/**
  * @brief  Disable chopper mode
  * @rmtoll PCCTL          CHPEN           LL_EPWM_PC_DisableChopper
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_PC_DisableChopper(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->PCCTL, EPWM_PCCTL_CHPEN);
}

/**
  * @brief  Indicates whether chopper mode is enabled.
  * @rmtoll PCCTL          CHPEN          LL_EPWM_PC_IsEnabledChopper
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_PC_IsEnabledChopper(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->PCCTL, EPWM_PCCTL_CHPEN) == (EPWM_PCCTL_CHPEN)) ? 1UL : 0UL);
}

/**
  * @brief  Set chopper duty cycle.
  * @note This function sets the chopping clock duty cycle. The value of
  *       dutyCycleCount should be less than 7. The dutyCycleCount value is converted
  *       to the actual chopper duty cycle value base on the following equation:
  *       chopper duty cycle = (dutyCycleCount + 1) / 8
  * @rmtoll PCCTL          CHPDUTY           LL_EPWM_PC_SetDutyCycle
  * @param  EPWMx EPWM instance
  * @param  dutyCycleCount the chopping clock duty cycle count.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_PC_SetDutyCycle(EPWM_TypeDef *EPWMx, uint16_t dutyCycleCount)
{
  MODIFY_REG(EPWMx->PCCTL, EPWM_PCCTL_CHPDUTY, (dutyCycleCount << EPWM_PCCTL_CHPDUTY_Pos));
}

/**
  * @brief  Get chopper duty cycle.
  * @rmtoll PCCTL          CHPDUTY           LL_EPWM_PC_GetDutyCycle
  * @param  EPWMx EPWM instance
  * @retval the chopping clock duty cycle count.
  */
__STATIC_INLINE uint16_t LL_EPWM_PC_GetDutyCycle(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->PCCTL) & EPWM_PCCTL_CHPDUTY) >> EPWM_PCCTL_CHPDUTY_Pos);
}

/**
  * @brief  Set chopper clock frequency scaler.
  * @note This function sets the scaler for the chopping clock frequency. The value
  *       of freqDiv should be less than 8. The chopping clock frequency is altered
  *       based on the following equation.
  *       chopper clock frequency = SYSCLKOUT / ( 1 + freqDiv)
  * @rmtoll PCCTL          CHPFREQ           LL_EPWM_PC_SetFreq
  * @param  EPWMx EPWM instance
  * @param  freqDiv the chopping clock frequency divider.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_PC_SetFreq(EPWM_TypeDef *EPWMx, uint16_t freqDiv)
{
  MODIFY_REG(EPWMx->PCCTL, EPWM_PCCTL_CHPFREQ, (freqDiv << EPWM_PCCTL_CHPFREQ_Pos));
}

/**
  * @brief  Get chopper clock frequency scaler.
  * @rmtoll PCCTL          CHPFREQ           LL_EPWM_PC_GetFreq
  * @param  EPWMx EPWM instance
  * @retval the chopping clock frequency divider.
  */
__STATIC_INLINE uint16_t LL_EPWM_PC_GetFreq(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->PCCTL) & EPWM_PCCTL_CHPFREQ) >> EPWM_PCCTL_CHPFREQ_Pos);
}

/**
  * @brief  Set chopper clock frequency scaler.
  * @note This function sets the first pulse width of chopper output waveform. The
  *       value of firstPulseWidth should be less than 0x10. The value of the first
  *       pulse width in seconds is given using the following equation:
  *       first pulse width = 1 / (((firstPulseWidth + 1) * SYSCLKOUT)/8)
  * @rmtoll PCCTL          OSHTWTH           LL_EPWM_PC_SetFirstPulseWidth
  * @param  EPWMx EPWM instance
  * @param  firstPulseWidth the width of the first pulse.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_PC_SetFirstPulseWidth(EPWM_TypeDef *EPWMx, uint16_t firstPulseWidth)
{
  MODIFY_REG(EPWMx->PCCTL, EPWM_PCCTL_OSHTWTH, (firstPulseWidth << EPWM_PCCTL_OSHTWTH_Pos));
}

/**
  * @brief  Get chopper clock frequency scaler.
  * @rmtoll PCCTL          OSHTWTH           LL_EPWM_PC_GetFirstPulseWidth
  * @param  EPWMx EPWM instance
  * @retval the width of the first pulse.
  */
__STATIC_INLINE uint16_t LL_EPWM_PC_GetFirstPulseWidth(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->PCCTL) & EPWM_PCCTL_OSHTWTH) >> EPWM_PCCTL_OSHTWTH_Pos);
}

/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Trip_Zone Trip Zone configuration
  * @{
  */
/**
  * @brief  Enable Trip Zone signal.
  * @note A logical OR of the valid values can be passed as the tzSignal parameter
  * @rmtoll TZSEL          CBC1                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          CBC2                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          CBC3                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          CBC4                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          CBC5                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          CBC6                LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          DCAEVT2             LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          DCBEVT2             LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT1               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT2               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT3               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT4               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT5               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          OSHT6               LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          DCAEVT1             LL_EPWM_TZ_EnableSignals\n
  *         TZSEL          DCBEVT1             LL_EPWM_TZ_EnableSignals
  * @param  EPWMx EPWM instance
  * @param  tzSignal This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT1
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableSignals(EPWM_TypeDef *EPWMx, uint16_t tzSignal)
{
  SET_BIT(EPWMx->TZSEL, tzSignal);
}

/**
  * @brief  Disables Trip Zone signal.
  * @note A logical OR of the valid values can be passed as the tzSignal parameter
  * @rmtoll TZSEL          CBC1                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          CBC2                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          CBC3                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          CBC4                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          CBC5                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          CBC6                LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          DCAEVT2             LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          DCBEVT2             LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT1               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT2               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT3               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT4               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT5               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          OSHT6               LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          DCAEVT1             LL_EPWM_TZ_DisableSignals\n
  *         TZSEL          DCBEVT1             LL_EPWM_TZ_DisableSignals
  * @param  EPWMx EPWM instance
  * @param  tzSignal This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT1
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableSignals(EPWM_TypeDef *EPWMx, uint16_t tzSignal)
{
  CLEAR_BIT(EPWMx->TZSEL, tzSignal);
}

/**
  * @brief  Indicates whether Trip Zone signal is enabled.
  * @note A logical OR of the valid values can be passed as the tzSignal parameter
  * @rmtoll TZSEL          CBC1                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          CBC2                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          CBC3                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          CBC4                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          CBC5                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          CBC6                LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          DCAEVT2             LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          DCBEVT2             LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT1               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT2               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT3               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT4               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT5               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          OSHT6               LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          DCAEVT1             LL_EPWM_TZ_IsEnabledSignals\n
  *         TZSEL          DCBEVT1             LL_EPWM_TZ_IsEnabledSignals
  * @param  EPWMx EPWM instance
  * @param  tzSignal This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_CBC6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT2
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT3
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT4
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT5
  *         @arg @ref LL_EPWM_TZ_SIGNAL_OSHT6
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCAEVT1
  *         @arg @ref LL_EPWM_TZ_SIGNAL_DCBEVT1
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledSignals(EPWM_TypeDef *EPWMx, uint16_t tzSignal)
{
  return ((READ_BIT(EPWMx->TZSEL, tzSignal) == (tzSignal)) ? 1UL : 0UL);
}

/**
  * @brief  Set Digital compare conditions that cause Trip Zone event.
  * @note This function sets up the Digital Compare output Trip Zone event sources.
  *       The dcType variable specifies the event source to be whether Digital
  *       Compare output A or Digital Compare output B. The dcEvent parameter
  *       specifies the event that causes Trip Zone.
  * @rmtoll TZDCSEL          DCAEVT1           LL_EPWM_TZ_SetDigitalCompareEventCondition\n
  *         TZDCSEL          DCAEVT2           LL_EPWM_TZ_SetDigitalCompareEventCondition\n
  *         TZDCSEL          DCBEVT1           LL_EPWM_TZ_SetDigitalCompareEventCondition\n
  *         TZDCSEL          DCBEVT2           LL_EPWM_TZ_SetDigitalCompareEventCondition
  * @param  EPWMx EPWM instance
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_A1
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_A2
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_B1
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_B2
  * @param  dcEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_EVENT_DC_DISABLED
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXH_LOW
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXH_HIGH
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_LOW
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_HIGH
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_HIGH_DCXH_LOW
  * @note  x in DCxH/DCxL represents DCAH/DCAL or DCBH/DCBL
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetDigitalCompareEventCondition(EPWM_TypeDef *EPWMx, uint16_t dcType, uint16_t dcEvent)
{
  MODIFY_REG(EPWMx->TZDCSEL, (EPWM_TZDCSEL_DCAEVT1 << dcType), (dcEvent << dcType));
}

/**
  * @brief  Get Digital compare conditions that cause Trip Zone event.
  * @rmtoll TZDCSEL          DCAEVT1           LL_EPWM_TZ_GetDigitalCompareEventCondition\n
  *         TZDCSEL          DCAEVT2           LL_EPWM_TZ_GetDigitalCompareEventCondition\n
  *         TZDCSEL          DCBEVT1           LL_EPWM_TZ_GetDigitalCompareEventCondition\n
  *         TZDCSEL          DCBEVT2           LL_EPWM_TZ_GetDigitalCompareEventCondition
  * @param  EPWMx EPWM instance
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_A1
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_A2
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_B1
  *         @arg @ref LL_EPWM_TZ_DC_OUTPUT_B2
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_EVENT_DC_DISABLED
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXH_LOW
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXH_HIGH
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_LOW
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_HIGH
  *         @arg @ref LL_EPWM_TZ_EVENT_DCXL_HIGH_DCXH_LOW
  * @note  x in DCxH/DCxL represents DCAH/DCAL or DCBH/DCBL
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetDigitalCompareEventCondition(EPWM_TypeDef *EPWMx, uint16_t dcType)
{
  return (uint16_t)((READ_REG(EPWMx->TZDCSEL) & (EPWM_TZDCSEL_DCAEVT1 << dcType)) >> dcType);
}

/**
  * @brief  Enable advanced Trip Zone event Action.
  * @rmtoll TZCTL2          ETZE           LL_EPWM_TZ_EnableAdvAction
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableAdvAction(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCTL2, EPWM_TZCTL2_ETZE);
}

/**
  * @brief  Disable advanced Trip Zone event Action.
  * @rmtoll TZCTL2          ETZE           LL_EPWM_TZ_DisableAdvAction
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableAdvAction(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZCTL2, EPWM_TZCTL2_ETZE);
}

/**
  * @brief  Indicates whether advanced Trip Zone event Action is enabled.
  * @rmtoll TZCTL2          ETZE          LL_EPWM_TZ_IsEnabledAdvAction
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledAdvAction(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCTL2, EPWM_TZCTL2_ETZE) == (EPWM_TZCTL2_ETZE)) ? 1UL : 0UL);
}

/**
  * @brief  Set Trip Zone Action.
  * @note Disable the advanced Trip Zone event using
  *       EPWM_TZ_DisableAdvAction()  before calling this function.
  * @note This function operates on both EPWMA and EPWMB depending on the
  *       tzEvent parameter.
  * @rmtoll TZCTL          TZA               LL_EPWM_TZ_SetAction\n
  *         TZCTL          TZB               LL_EPWM_TZ_SetAction\n
  *         TZCTL          DCAEVT1           LL_EPWM_TZ_SetAction\n
  *         TZCTL          DCAEVT2           LL_EPWM_TZ_SetAction\n
  *         TZCTL          DCBEVT1           LL_EPWM_TZ_SetAction\n
  *         TZCTL          DCBEVT2           LL_EPWM_TZ_SetAction
  * @param  EPWMx EPWM instance
  * @param  tzEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCBEVT2
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCBEVT1
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCAEVT2
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCAEVT1
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_TZB
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_TZA
  * @param  tzAction This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ACTION_DISABLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetAction(EPWM_TypeDef *EPWMx, uint16_t tzEvent, uint16_t tzAction)
{
  MODIFY_REG(EPWMx->TZCTL, (EPWM_TZCTL_TZA << tzEvent), (tzAction << tzEvent));
}

/**
  * @brief  Get Trip Zone Action.
  * @rmtoll TZCTL          TZA               LL_EPWM_TZ_GetAction\n
  *         TZCTL          TZB               LL_EPWM_TZ_GetAction\n
  *         TZCTL          DCAEVT1           LL_EPWM_TZ_GetAction\n
  *         TZCTL          DCAEVT2           LL_EPWM_TZ_GetAction\n
  *         TZCTL          DCBEVT1           LL_EPWM_TZ_GetAction\n
  *         TZCTL          DCBEVT2           LL_EPWM_TZ_GetAction
  * @param  EPWMx EPWM instance
  * @param  tzEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCBEVT2
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCBEVT1
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCAEVT2
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_DCAEVT1
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_TZB
  *         @arg @ref LL_EPWM_TZ_ACTION_EVENT_TZA
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ACTION_DISABLE
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetAction(EPWM_TypeDef *EPWMx, uint16_t tzEvent)
{
  return (uint16_t)((READ_REG(EPWMx->TZCTL) & (EPWM_TZCTL_TZA << tzEvent)) >> tzEvent);
}

/**
  * @brief  Set Advanced Trip Zone Action.
  * @note This function enables the advanced Trip Zone event.
  * @note This function operates on both EPWMA and EPWMB depending on the
  *       tzAdvEvent  parameter.
  * @note Advanced Trip Zone events take into consideration the direction of
  *       the counter in addition to Trip Zone events.
  * @rmtoll TZCTL2          TZA_U               LL_EPWM_TZ_SetAdvAction\n
  *         TZCTL2          TZA_D               LL_EPWM_TZ_SetAdvAction\n
  *         TZCTL2          TZB_U               LL_EPWM_TZ_SetAdvAction\n
  *         TZCTL2          TZB_D               LL_EPWM_TZ_SetAdvAction\n
  *         TZCTL2          ETZE                LL_EPWM_TZ_SetAdvAction
  * @param  EPWMx EPWM instance
  * @param  tzAdvEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_U
  * @param  tzAdvAction This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetAdvAction(EPWM_TypeDef *EPWMx, uint16_t tzAdvEvent, uint16_t tzAdvAction)
{
  MODIFY_REG(EPWMx->TZCTL2, (EPWM_TZCTL2_TZAU << tzAdvEvent), (tzAdvAction << tzAdvEvent));
}

/**
  * @brief  Get Advanced Trip Zone Action.
  * @rmtoll TZCTL2          TZA_U               LL_EPWM_TZ_GetAdvAction\n
  *         TZCTL2          TZA_D               LL_EPWM_TZ_GetAdvAction\n
  *         TZCTL2          TZB_U               LL_EPWM_TZ_GetAdvAction\n
  *         TZCTL2          TZB_D               LL_EPWM_TZ_GetAdvAction\n
  *         TZCTL2          ETZE                LL_EPWM_TZ_GetAdvAction
  * @param  EPWMx EPWM instance
  * @param  tzAdvEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZB_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_TZA_U
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetAdvAction(EPWM_TypeDef *EPWMx, uint16_t tzAdvEvent)
{
  return (uint16_t)((READ_REG(EPWMx->TZCTL2) & (EPWM_TZCTL2_TZAU << tzAdvEvent)) >> tzAdvEvent);
}

/**
  * @brief  Set Advanced Digital Compare Trip Zone Action on EPWMA.
  * @note This function enables the advanced Trip Zone event.
  * @note Advanced Trip Zone events take into consideration the direction of
  *       the counter in addition to Digital Compare Trip Zone events.
  * @rmtoll TZCTLDCA          DCxEVT1_U               LL_EPWM_TZ_SetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT1_D               LL_EPWM_TZ_SetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT2_U               LL_EPWM_TZ_SetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT2_D               LL_EPWM_TZ_SetAdvDigitalCompareActionA\n
  *         TZCTL2            ETZE                    LL_EPWM_TZ_SetAdvDigitalCompareActionA
  * @param  EPWMx EPWM instance
  * @param  tzAdvDCEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_U
  * @param  tzAdvDCAction This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetAdvDigitalCompareActionA(EPWM_TypeDef *EPWMx, uint16_t tzAdvDCEvent, uint16_t tzAdvDCAction)
{
  MODIFY_REG(EPWMx->TZCTLDCA, (EPWM_TZCTLDCA_DCAEVT1U << tzAdvDCEvent), (tzAdvDCAction << tzAdvDCEvent));
}

/**
  * @brief  Get Advanced Digital Compare Trip Zone Action on EPWMA.
  * @rmtoll TZCTLDCA          DCxEVT1_U               LL_EPWM_TZ_GetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT1_D               LL_EPWM_TZ_GetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT2_U               LL_EPWM_TZ_GetAdvDigitalCompareActionA\n
  *         TZCTLDCA          DCxEVT2_D               LL_EPWM_TZ_GetAdvDigitalCompareActionA\n
  *         TZCTL2            ETZE                    LL_EPWM_TZ_GetAdvDigitalCompareActionA
  * @param  EPWMx EPWM instance
  * @param  tzAdvDCEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_U
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetAdvDigitalCompareActionA(EPWM_TypeDef *EPWMx, uint16_t tzAdvDCEvent)
{
  return (uint16_t)((READ_REG(EPWMx->TZCTLDCA) & (EPWM_TZCTLDCA_DCAEVT1U << tzAdvDCEvent)) >> tzAdvDCEvent);
}

/**
  * @brief  Set Advanced Digital Compare Trip Zone Action on EPWMB.
  * @note This function enables the advanced Trip Zone event.
  * @note Advanced Trip Zone events take into consideration the direction of
  *       the counter in addition to Digital Compare Trip Zone events.
  * @rmtoll TZCTLDCB          DCxEVT1_U               LL_EPWM_TZ_SetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT1_D               LL_EPWM_TZ_SetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT2_U               LL_EPWM_TZ_SetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT2_D               LL_EPWM_TZ_SetAdvDigitalCompareActionB\n
  *         TZCTL2            ETZE                    LL_EPWM_TZ_SetAdvDigitalCompareActionB
  * @param  EPWMx EPWM instance
  * @param  tzAdvDCEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_U
  * @param  tzAdvDCAction This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetAdvDigitalCompareActionB(EPWM_TypeDef *EPWMx, uint16_t tzAdvDCEvent, uint16_t tzAdvDCAction)
{
  MODIFY_REG(EPWMx->TZCTLDCB, (EPWM_TZCTLDCB_DCBEVT1U << tzAdvDCEvent), (tzAdvDCAction << tzAdvDCEvent));
}

/**
  * @brief  Get Advanced Digital Compare Trip Zone Action on EPWMB.
  * @rmtoll TZCTLDCB          DCxEVT1_U               LL_EPWM_TZ_GetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT1_D               LL_EPWM_TZ_GetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT2_U               LL_EPWM_TZ_GetAdvDigitalCompareActionB\n
  *         TZCTLDCB          DCxEVT2_D               LL_EPWM_TZ_GetAdvDigitalCompareActionB\n
  *         TZCTL2            ETZE                    LL_EPWM_TZ_GetAdvDigitalCompareActionB
  * @param  EPWMx EPWM instance
  * @param  tzAdvDCEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT2_U
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_D
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_EVENT_DCxEVT1_U
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH_Z
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_HIGH
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_LOW
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_TOGGLE
  *         @arg @ref LL_EPWM_TZ_ADV_ACTION_DISABLE
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetAdvDigitalCompareActionB(EPWM_TypeDef *EPWMx, uint16_t tzAdvDCEvent)
{
  return (uint16_t)((READ_REG(EPWMx->TZCTLDCB) & (EPWM_TZCTLDCB_DCBEVT1U << tzAdvDCEvent)) >> tzAdvDCEvent);
}

/**
  * @brief  Set the Trip Zone CycleByCycle pulse clear event.
  * @rmtoll TZCLR          CBCPULSE               LL_EPWM_TZ_SetCBCClearEvent
  * @param  EPWMx EPWM instance
  * @param  clearEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_PERIOD
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_SetCBCClearEvent(EPWM_TypeDef *EPWMx, uint16_t clearEvent)
{
  MODIFY_REG(EPWMx->TZCLR, EPWM_TZCLR_CBCPULSE, clearEvent);
}

/**
  * @brief  Get the Trip Zone CycleByCycle pulse clear event.
  * @rmtoll TZCLR          CBCPULSE               LL_EPWM_TZ_GetCBCClearEvent
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_PERIOD
  *         @arg @ref LL_EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD
  */
__STATIC_INLINE uint16_t LL_EPWM_TZ_GetCBCClearEvent(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TZCLR) & EPWM_TZCLR_CBCPULSE);
}

/**
  * @brief  Enable trip Zones Cycle By Cycle interrupt (CBC).
  * @rmtoll TZEINT         CBC           LL_EPWM_TZ_EnableIT_CBC
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_CBC(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_CBC);
}

/**
  * @brief  Disable trip Zones Cycle By Cycle interrupt (CBC).
  * @rmtoll TZEINT         CBC           LL_EPWM_TZ_DisableIT_CBC
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_CBC(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_CBC);
}

/**
  * @brief  Indicates whether trip Zones Cycle By Cycle interrupt (CBC) is enabled.
  * @rmtoll TZEINT         CBC           LL_EPWM_TZ_IsEnabledIT_CBC
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_CBC(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_CBC) == (EPWM_TZEINT_CBC)) ? 1UL : 0UL);
}

/**
  * @brief  Enable trip Zones One Shot interrupt (OST).
  * @rmtoll TZEINT         OST           LL_EPWM_TZ_EnableIT_OST
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_OST(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_OST);
}

/**
  * @brief  Disable trip Zones One Shot interrupt (OST).
  * @rmtoll TZEINT         OST           LL_EPWM_TZ_DisableIT_OST
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_OST(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_OST);
}

/**
  * @brief  Indicates whether trip Zones One Shot interrupt (OST) is enabled.
  * @rmtoll TZEINT         OST           LL_EPWM_TZ_IsEnabledIT_OST
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_OST(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_OST) == (EPWM_TZEINT_OST)) ? 1UL : 0UL);
}

/**
  * @brief  Enable digital Compare A Event 1 interrupt (DCAEVT1).
  * @rmtoll TZEINT         DCAEVT1           LL_EPWM_TZ_EnableIT_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT1);
}

/**
  * @brief  Disable digital Compare A Event 1 interrupt (DCAEVT1).
  * @rmtoll TZEINT         DCAEVT1           LL_EPWM_TZ_DisableIT_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT1);
}

/**
  * @brief  Indicates whether digital Compare A Event 1 interrupt (DCAEVT1) is enabled.
  * @rmtoll TZEINT         DCAEVT1           LL_EPWM_TZ_IsEnabledIT_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT1) == (EPWM_TZEINT_DCAEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Enable digital Compare A Event 2 interrupt (DCAEVT2).
  * @rmtoll TZEINT         DCAEVT2           LL_EPWM_TZ_EnableIT_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT2);
}

/**
  * @brief  Disable digital Compare A Event 2 interrupt (DCAEVT2).
  * @rmtoll TZEINT         DCAEVT2           LL_EPWM_TZ_DisableIT_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT2);
}

/**
  * @brief  Indicates whether digital Compare A Event 2 interrupt (DCAEVT2) is enabled.
  * @rmtoll TZEINT         DCAEVT2           LL_EPWM_TZ_IsEnabledIT_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCAEVT2) == (EPWM_TZEINT_DCAEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Enable digital Compare B Event 1 interrupt (DCBEVT1).
  * @rmtoll TZEINT         DCBEVT1           LL_EPWM_TZ_EnableIT_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT1);
}

/**
  * @brief  Disable digital Compare B Event 1 interrupt (DCBEVT1).
  * @rmtoll TZEINT         DCBEVT1           LL_EPWM_TZ_DisableIT_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT1);
}

/**
  * @brief  Indicates whether digital Compare B Event 1 interrupt (DCBEVT1) is enabled.
  * @rmtoll TZEINT         DCBEVT1           LL_EPWM_TZ_IsEnabledIT_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT1) == (EPWM_TZEINT_DCBEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Enable digital Compare B Event 2 interrupt (DCBEVT2).
  * @rmtoll TZEINT         DCBEVT2           LL_EPWM_TZ_EnableIT_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_EnableIT_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT2);
}

/**
  * @brief  Disable digital Compare B Event 2 interrupt (DCBEVT2).
  * @rmtoll TZEINT         DCBEVT2           LL_EPWM_TZ_DisableIT_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_DisableIT_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT2);
}

/**
  * @brief  Indicates whether digital Compare B Event 2 interrupt (DCBEVT2) is enabled.
  * @rmtoll TZEINT         DCBEVT2           LL_EPWM_TZ_IsEnabledIT_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsEnabledIT_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZEINT, EPWM_TZEINT_DCBEVT2) == (EPWM_TZEINT_DCBEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Indicate whether trip zone interrupt flag (INT) is set.
  * @rmtoll TZFLG           INT           LL_EPWM_TZ_IsActiveFlag_INT
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_INT(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_INT) == (EPWM_TZFLG_INT)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the trip zone interrupt flag (INT).
  * @rmtoll TZCLR           INT         LL_EPWM_TZ_ClearFlag_INT
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_INT(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_INT);
}

/**
  * @brief  Indicate whether trip Zones Cycle By Cycle flag (CBC) is set.
  * @rmtoll TZFLG           CBC           LL_EPWM_TZ_IsActiveFlag_CBC
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_CBC) == (EPWM_TZFLG_CBC)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the trip Zones Cycle By Cycle flag (CBC).
  * @rmtoll TZCLR           CBC         LL_EPWM_TZ_ClearFlag_CBC
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_CBC);
}

/**
  * @brief  Indicate whether trip Zones One Shot flag (OST) is set.
  * @rmtoll TZFLG           OST           LL_EPWM_TZ_IsActiveFlag_OST
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_OST) == (EPWM_TZFLG_OST)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the trip Zones One Shot flag (OST).
  * @rmtoll TZCLR           OST         LL_EPWM_TZ_ClearFlag_OST
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_OST);
}

/**
  * @brief  Indicate whether digital Compare A Event 1 flag (DCAEVT1) is set.
  * @rmtoll TZFLG           DCAEVT1           LL_EPWM_TZ_IsActiveFlag_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_DCAEVT1) == (EPWM_TZFLG_DCAEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the digital Compare A Event 1 flag (DCAEVT1).
  * @rmtoll TZCLR           DCAEVT1         LL_EPWM_TZ_ClearFlag_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_DCAEVT1);
}

/**
  * @brief  Indicate whether digital Compare A Event 2 flag (DCAEVT2) is set.
  * @rmtoll TZFLG           DCAEVT2           LL_EPWM_TZ_IsActiveFlag_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_DCAEVT2) == (EPWM_TZFLG_DCAEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the digital Compare A Event 2 flag (DCAEVT2).
  * @rmtoll TZCLR           DCAEVT2         LL_EPWM_TZ_ClearFlag_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_DCAEVT2);
}

/**
  * @brief  Indicate whether digital Compare B Event 1 flag (DCBEVT1) is set.
  * @rmtoll TZFLG           DCBEVT1           LL_EPWM_TZ_IsActiveFlag_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_DCBEVT1) == (EPWM_TZFLG_DCBEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the digital Compare B Event 1 flag (DCBEVT1).
  * @rmtoll TZCLR           DCBEVT1         LL_EPWM_TZ_ClearFlag_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_DCBEVT1);
}

/**
  * @brief  Indicate whether digital Compare B Event 2 flag (DCBEVT2) is set.
  * @rmtoll TZFLG           DCBEVT2           LL_EPWM_TZ_IsActiveFlag_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZFLG, EPWM_TZFLG_DCBEVT2) == (EPWM_TZFLG_DCBEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the digital Compare B Event 2 flag (DCBEVT2).
  * @rmtoll TZCLR           DCBEVT2         LL_EPWM_TZ_ClearFlag_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCLR, EPWM_TZFLG_DCBEVT2);
}

/**
  * @brief  Indicate whether CBC flag 1 (CBC1) is set.
  * @rmtoll TZCBCFLG           CBC1           LL_EPWM_TZ_IsActiveFlag_CBC1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC1) == (EPWM_TZCBCFLG_CBC1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 1 (CBC1).
  * @rmtoll TZCBCCLR           CBC1         LL_EPWM_TZ_ClearFlag_CBC1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC1);
}

/**
  * @brief  Indicate whether CBC flag 2 (CBC2) is set.
  * @rmtoll TZCBCFLG           CBC2           LL_EPWM_TZ_IsActiveFlag_CBC2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC2) == (EPWM_TZCBCFLG_CBC2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 2 (CBC2).
  * @rmtoll TZCBCCLR           CBC2         LL_EPWM_TZ_ClearFlag_CBC2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC2);
}

/**
  * @brief  Indicate whether CBC flag 3 (CBC3) is set.
  * @rmtoll TZCBCFLG           CBC3           LL_EPWM_TZ_IsActiveFlag_CBC3
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC3(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC3) == (EPWM_TZCBCFLG_CBC3)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 3 (CBC3).
  * @rmtoll TZCBCCLR           CBC3         LL_EPWM_TZ_ClearFlag_CBC3
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC3(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC3);
}

/**
  * @brief  Indicate whether CBC flag 4 (CBC4) is set.
  * @rmtoll TZCBCFLG           CBC4           LL_EPWM_TZ_IsActiveFlag_CBC4
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC4(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC4) == (EPWM_TZCBCFLG_CBC4)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 4 (CBC4).
  * @rmtoll TZCBCCLR           CBC4         LL_EPWM_TZ_ClearFlag_CBC4
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC4(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC4);
}

/**
  * @brief  Indicate whether CBC flag 5 (CBC5) is set.
  * @rmtoll TZCBCFLG           CBC5           LL_EPWM_TZ_IsActiveFlag_CBC5
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC5(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC5) == (EPWM_TZCBCFLG_CBC5)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 5 (CBC5).
  * @rmtoll TZCBCCLR           CBC5         LL_EPWM_TZ_ClearFlag_CBC5
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC5(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC5);
}

/**
  * @brief  Indicate whether CBC flag 6 (CBC6) is set.
  * @rmtoll TZCBCFLG           CBC6           LL_EPWM_TZ_IsActiveFlag_CBC6
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBC6(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_CBC6) == (EPWM_TZCBCFLG_CBC6)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag 6 (CBC6).
  * @rmtoll TZCBCCLR           CBC6         LL_EPWM_TZ_ClearFlag_CBC6
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBC6(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_CBC6);
}

/**
  * @brief  Indicate whether CBC flag Digital compare event A2 (DCAEVT2) is set.
  * @rmtoll TZCBCFLG           DCAEVT2           LL_EPWM_TZ_IsActiveFlag_CBCDCAEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBCDCAEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_DCAEVT2) == (EPWM_TZCBCFLG_DCAEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag Digital compare event A2 (DCAEVT2).
  * @rmtoll TZCBCCLR           DCAEVT2         LL_EPWM_TZ_ClearFlag_CBCDCAEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBCDCAEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_DCAEVT2);
}

/**
  * @brief  Indicate whether CBC flag Digital compare event B2 (DCBEVT2) is set.
  * @rmtoll TZCBCFLG           DCBEVT2           LL_EPWM_TZ_IsActiveFlag_CBCDCBEVT2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_CBCDCBEVT2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZCBCFLG, EPWM_TZCBCFLG_DCBEVT2) == (EPWM_TZCBCFLG_DCBEVT2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the CBC flag Digital compare event B2 (DCBEVT2).
  * @rmtoll TZCBCCLR           DCBEVT2         LL_EPWM_TZ_ClearFlag_CBCDCBEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_CBCDCBEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZCBCCLR, EPWM_TZCBCFLG_DCBEVT2);
}

/**
  * @brief  Indicate whether OST flag OST1 (OST1) is set.
  * @rmtoll TZOSTFLG           OST1           LL_EPWM_TZ_IsActiveFlag_OST1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST1) == (EPWM_TZOSTFLG_OST1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST1 (OST1)
  * @rmtoll TZOSTCLR           OST1         LL_EPWM_TZ_ClearFlag_OST1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST1);
}

/**
  * @brief  Indicate whether OST flag OST2 (OST2) is set.
  * @rmtoll TZOSTFLG           OST2           LL_EPWM_TZ_IsActiveFlag_OST2
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST2(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST2) == (EPWM_TZOSTFLG_OST2)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST2 (OST2)
  * @rmtoll TZOSTCLR           OST2         LL_EPWM_TZ_ClearFlag_OST2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST2);
}

/**
  * @brief  Indicate whether OST flag OST3 (OST3) is set.
  * @rmtoll TZOSTFLG           OST3           LL_EPWM_TZ_IsActiveFlag_OST3
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST3(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST3) == (EPWM_TZOSTFLG_OST3)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST3 (OST3)
  * @rmtoll TZOSTCLR           OST3         LL_EPWM_TZ_ClearFlag_OST3
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST3(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST3);
}

/**
  * @brief  Indicate whether OST flag OST4 (OST4) is set.
  * @rmtoll TZOSTFLG           OST4           LL_EPWM_TZ_IsActiveFlag_OST4
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST4(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST4) == (EPWM_TZOSTFLG_OST4)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST4 (OST4)
  * @rmtoll TZOSTCLR           OST4         LL_EPWM_TZ_ClearFlag_OST4
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST4(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST4);
}

/**
  * @brief  Indicate whether OST flag OST5 (OST5) is set.
  * @rmtoll TZOSTFLG           OST5           LL_EPWM_TZ_IsActiveFlag_OST5
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST5(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST5) == (EPWM_TZOSTFLG_OST5)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST5 (OST5)
  * @rmtoll TZOSTCLR           OST5         LL_EPWM_TZ_ClearFlag_OST5
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST5(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST5);
}

/**
  * @brief  Indicate whether OST flag OST6 (OST6) is set.
  * @rmtoll TZOSTFLG           OST6           LL_EPWM_TZ_IsActiveFlag_OST6
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OST6(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_OST6) == (EPWM_TZOSTFLG_OST6)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag OST6 (OST6)
  * @rmtoll TZOSTCLR           OST6         LL_EPWM_TZ_ClearFlag_OST6
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OST6(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_OST6);
}

/**
  * @brief  Indicate whether OST flag Digital compare event A1(DCAEVT1) is set.
  * @rmtoll TZOSTFLG           DCAEVT1           LL_EPWM_TZ_IsActiveFlag_OSTDCAEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OSTDCAEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_DCAEVT1) == (EPWM_TZOSTFLG_DCAEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag Digital compare event A1(DCAEVT1)
  * @rmtoll TZOSTCLR           DCAEVT1         LL_EPWM_TZ_ClearFlag_OSTDCAEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OSTDCAEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_DCAEVT1);
}

/**
  * @brief  Indicate whether OST flag Digital compare event B1(DCBEVT1) is set.
  * @rmtoll TZOSTFLG           DCBEVT1           LL_EPWM_TZ_IsActiveFlag_OSTDCBEVT1
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_TZ_IsActiveFlag_OSTDCBEVT1(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->TZOSTFLG, EPWM_TZOSTFLG_DCBEVT1) == (EPWM_TZOSTFLG_DCBEVT1)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the OST flag Digital compare event B1(DCBEVT1)
  * @rmtoll TZOSTCLR           DCBEVT1         LL_EPWM_TZ_ClearFlag_OSTDCBEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_ClearFlag_OSTDCBEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZOSTCLR, EPWM_TZOSTFLG_DCBEVT1);
}

/**
  * @brief  Generate Cycle By Cycle trip event
  * @rmtoll TZFRC          CBC            LL_EPWM_TZ_GenerateEvent_CBC
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_CBC(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_CBC);
}

/**
  * @brief  Generate a One-Shot Trip Event
  * @rmtoll TZFRC          OST            LL_EPWM_TZ_GenerateEvent_OST
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_OST(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_OST);
}

/**
  * @brief  Generate Digital Compare Output A Event 1
  * @rmtoll TZFRC          DCAEVT1            LL_EPWM_TZ_GenerateEvent_DCAEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_DCAEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_DCAEVT1);
}

/**
  * @brief  Generate Digital Compare Output A Event 2
  * @rmtoll TZFRC          DCAEVT2            LL_EPWM_TZ_GenerateEvent_DCAEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_DCAEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_DCAEVT2);
}

/**
  * @brief  Generate Digital Compare Output B Event 1
  * @rmtoll TZFRC          DCBEVT1            LL_EPWM_TZ_GenerateEvent_DCBEVT1
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_DCBEVT1(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_DCBEVT1);
}

/**
  * @brief  Generate Digital Compare Output B Event 2
  * @rmtoll TZFRC          DCBEVT2            LL_EPWM_TZ_GenerateEvent_DCBEVT2
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_TZ_GenerateEvent_DCBEVT2(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->TZFRC, EPWM_TZFRC_DCBEVT2);
}
/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Event_Trigger Event Trigger configuration
  * @{
  */
/**
  * @brief  Enable EPWM interrupt.
  * @rmtoll ETSEL          INTEN           LL_EPWM_ET_EnableInterrupt
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_EnableInterrupt(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETSEL, EPWM_ETSEL_INTEN);
}

/**
  * @brief  Disable EPWM interrupt.
  * @rmtoll ETSEL          INTEN           LL_EPWM_ET_DisableInterrupt
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_DisableInterrupt(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->ETSEL, EPWM_ETSEL_INTEN);
}

/**
  * @brief  Indicates whether EPWM interrupt is enabled.
  * @rmtoll ETSEL          INTEN          LL_EPWM_ET_IsEnabledInterrupt
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_ET_IsEnabledInterrupt(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->ETSEL, EPWM_ETSEL_INTEN) == (EPWM_ETSEL_INTEN)) ? 1UL : 0UL);
}

/**
  * @brief  Sets the EPWM interrupt source.
  * @rmtoll ETSEL          INTSEL                  LL_EPWM_ET_SetInterruptSource\n
  *         ETSEL          INTSELCMP               LL_EPWM_ET_SetInterruptSource
  * @param  EPWMx EPWM instance
  * @param  interruptSource This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_INT_CNTR_DISABLED
  *         @arg @ref LL_EPWM_INT_CNTR_ZERO
  *         @arg @ref LL_EPWM_INT_CNTR_PERIOD
  *         @arg @ref LL_EPWM_INT_CNTR_ZERO_OR_PERIOD
  *         @arg @ref LL_EPWM_INT_CNTR_U_CMPx (Where x is A,B,C or D)
  *         @arg @ref LL_EPWM_INT_CNTR_D_CMPx (Where x is A,B,C or D)
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_SetInterruptSource(EPWM_TypeDef *EPWMx, uint16_t interruptSource)
{
  MODIFY_REG(EPWMx->ETSEL, (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL), interruptSource);
}

/**
  * @brief  Gets the EPWM interrupt source.
  * @rmtoll ETSEL          INTSEL                  LL_EPWM_ET_GetInterruptSource\n
  *         ETSEL          INTSELCMP               LL_EPWM_ET_GetInterruptSource
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_INT_CNTR_DISABLED
  *         @arg @ref LL_EPWM_INT_CNTR_ZERO
  *         @arg @ref LL_EPWM_INT_CNTR_PERIOD
  *         @arg @ref LL_EPWM_INT_CNTR_ZERO_OR_PERIOD
  *         @arg @ref LL_EPWM_INT_CNTR_U_CMPx (Where x is A,B,C or D)
  *         @arg @ref LL_EPWM_INT_CNTR_D_CMPx (Where x is A,B,C or D)
  */
__STATIC_INLINE uint16_t LL_EPWM_ET_GetInterruptSource(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->ETSEL) & (EPWM_ETSEL_INTSELCMP | EPWM_ETSEL_INTSEL));
}

/**
  * @brief  Sets the EPWM interrupt event counts.
  * @rmtoll ETINTPS          INTPRD2           LL_EPWM_ET_SetInterruptEventCount\n
  *         ETPS             INTPSSEL          LL_EPWM_ET_SetInterruptEventCount
  * @param  EPWMx EPWM instance
  * @param  eventCount the event count for interrupt scale.
  *         Maximum value for eventCount is 15.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_SetInterruptEventCount(EPWM_TypeDef *EPWMx, uint16_t eventCount)
{
  SET_BIT(EPWMx->ETPS, EPWM_ETPS_INTPSSEL);
  MODIFY_REG(EPWMx->ETINTPS, EPWM_ETINTPS_INTPRD2, eventCount);
}

/**
  * @brief  Get the interrupt count.
  * @rmtoll ETINTPS          INTCNT2           LL_EPWM_ET_GetInterruptEventCount
  * @param  EPWMx EPWM instance
  * @retval The interrupt event counts that have occurred.
  */
__STATIC_INLINE uint16_t LL_EPWM_ET_GetInterruptEventCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->ETINTPS) & EPWM_ETINTPS_INTCNT2) >> EPWM_ETINTPS_INTCNT2_Pos);
}

/**
  * @brief  Indicate whether the event trigger zone interrupt(INT) is set.
  * @note This function doesn't return the Trip Zone status.
  * @rmtoll ETFLG           INT           LL_EPWM_ET_IsActiveFlag_INT
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_ET_IsActiveFlag_INT(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->ETFLG, EPWM_ETFLG_INT) == (EPWM_ETFLG_INT)) ? 1UL : 0UL);
}

/**
  * @brief  Clear the event trigger zone interrupt(INT)
  * @rmtoll ETCLR           INT         LL_EPWM_ET_ClearFlag_INT
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_ClearFlag_INT(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETCLR, EPWM_ETCLR_INT);
}

/**
  * @brief  Enable Pre-interrupt count load.
  * @note This is valid only for advanced/expanded interrupt mode
  * @rmtoll ETCNTINITCTL          INTINTEN           LL_EPWM_ET_EnableInterruptEventCountInit
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_EnableInterruptEventCountInit(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETCNTINITCTL, EPWM_ETCNTINITCTL_INTINTEN);
}

/**
  * @brief  Disable interrupt count load.
  * @rmtoll ETCNTINITCTL          INTINTEN           LL_EPWM_ET_DisableInterruptEventCountInit
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_DisableInterruptEventCountInit(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->ETCNTINITCTL, EPWM_ETCNTINITCTL_INTINTEN);
}

/**
  * @brief  Indicates whether pre-interrupt count load is enabled.
  * @rmtoll ETCNTINITCTL          INTINTEN          LL_EPWM_ET_IsEnabledInterruptEventCountInit
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_ET_IsEnabledInterruptEventCountInit(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->ETCNTINITCTL, EPWM_ETCNTINITCTL_INTINTEN) == (EPWM_ETCNTINITCTL_INTINTEN)) ? 1UL : 0UL);
}

/**
  * @brief  Force a software pre interrupt event counter load.
  * @rmtoll ETCNTINITCTL          INTINITFRC           LL_EPWM_ET_ForceInterruptEventCountInit
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_ForceInterruptEventCountInit(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETCNTINITCTL, EPWM_ETCNTINITCTL_INTINITFRC);
}

/**
  * @brief  Set interrupt count.
  * @rmtoll ETCNTINIT          INTINT           LL_EPWM_ET_SetInterruptEventCountInitValue
  * @param  EPWMx EPWM instance
  * @param  eventCount is the value of thepre-interrupt value that is to be loaded.
  *         The maximum value of eventCount is 15.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_SetInterruptEventCountInitValue(EPWM_TypeDef *EPWMx, uint16_t eventCount)
{
  MODIFY_REG(EPWMx->ETCNTINIT, EPWM_ETCNTINIT_INTINT, (uint16_t)(eventCount & 0xFU));
}

/**
  * @brief  Get interrupt count.
  * @rmtoll ETCNTINIT          INTINT           LL_EPWM_ET_GetInterruptEventCountInitValue
  * @param  EPWMx EPWM instance
  * @retval the value of thepre-interrupt value that is to be loaded.
  *         The maximum value of eventCount is 15.
  */
__STATIC_INLINE uint16_t LL_EPWM_ET_GetInterruptEventCountInitValue(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->ETCNTINIT) & EPWM_ETCNTINIT_INTINT);
}

/**
  * @brief  Force EPWM interrupt.
  * @rmtoll ETFRC          INT           LL_EPWM_ET_ForceInterrupt
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ET_ForceInterrupt(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETFRC, EPWM_ETFRC_INT);
}
/**
  * @}
  */

/** @defgroup EPWM_LL_EF_ADC_SOC ADC SOC configuration
  * @{
  */
/**
  * @brief  Enable ADC SOC event.
  * @rmtoll ETSEL          SOCAEN           LL_EPWM_EnableADCTrigger\n
  *         ETSEL          SOCBEN           LL_EPWM_EnableADCTrigger
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableADCTrigger(EPWM_TypeDef *EPWMx , uint16_t adcSOCType)
{
  SET_BIT(EPWMx->ETSEL, adcSOCType);
}

/**
  * @brief  Disable ADC SOC event.
  * @rmtoll ETSEL          SOCAEN           LL_EPWM_DisableADCTrigger\n
  *         ETSEL          SOCBEN           LL_EPWM_DisableADCTrigger
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableADCTrigger(EPWM_TypeDef *EPWMx , uint16_t adcSOCType)
{
  CLEAR_BIT(EPWMx->ETSEL, adcSOCType);
}

/**
  * @brief  Indicates whether ADC SOC event is enabled.
  * @rmtoll ETSEL          SOCAEN           LL_EPWM_IsEnabledADCTrigger\n
  *         ETSEL          SOCBEN           LL_EPWM_IsEnabledADCTrigger
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledADCTrigger(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  return ((READ_BIT(EPWMx->ETSEL, adcSOCType) == (adcSOCType)) ? 1UL : 0UL);
}

/**
  * @brief  Sets the EPWM SOC source.
  * @rmtoll ETSEL          SOCASEL           LL_EPWM_SetADCTriggerSource\n
  *         ETSEL          SOCASELCMP        LL_EPWM_SetADCTriggerSource\n
  *         ETSEL          SOCBSEL           LL_EPWM_SetADCTriggerSource\n
  *         ETSEL          SOCBSELCMP        LL_EPWM_SetADCTriggerSource
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @param  socSource This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_DCxEVT1
  *         @arg @ref LL_EPWM_SOC_CNTR_ZERO
  *         @arg @ref LL_EPWM_SOC_CNTR_PERIOD
  *         @arg @ref LL_EPWM_SOC_CNTR_ZERO_OR_PERIOD
  *         @arg @ref LL_EPWM_SOC_CNTR_U_CMPx (Where x is A,B,C or D)
  *         @arg @ref LL_EPWM_SOC_CNTR_D_CMPx (Where x is A,B,C or D)
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetADCTriggerSource(EPWM_TypeDef *EPWMx, uint16_t adcSOCType, uint16_t socSource)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  MODIFY_REG(EPWMx->ETSEL, ((EPWM_ETSEL_SOCASEL << (isBGroup * 4U)) | (EPWM_ETSEL_SOCASELCMP << isBGroup)),
  (((socSource & EPWM_ETSEL_SOCASEL) << (isBGroup * 4U)) | ((socSource & EPWM_ETSEL_SOCASELCMP) << (isBGroup))));
}

/**
  * @brief  Sets the EPWM SOC event counts.
  * @rmtoll ETSOCPS          SOCAPRD2           LL_EPWM_SetADCTriggerEventPrescale\n
  *         ETSOCPS          SOCBPRD2           LL_EPWM_SetADCTriggerEventPrescale\n
  *         ETPS             SOCPSSEL           LL_EPWM_SetADCTriggerEventPrescale
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @param  preScaleCount Generate SOC pulse every preScaleCount up to 15 events.
  *         A preScaleCount value of 0 disables the prescale.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetADCTriggerEventPrescale(EPWM_TypeDef *EPWMx, uint16_t adcSOCType, uint16_t preScaleCount)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  SET_BIT(EPWMx->ETPS, EPWM_ETPS_SOCPSSEL);
  MODIFY_REG(EPWMx->ETSOCPS, (EPWM_ETSOCPS_SOCAPRD2 << (isBGroup * 8U)), (preScaleCount << (isBGroup * 8U)));
}

/**
  * @brief  Indicate whether the SOCA event (SOCA) is set.
  * @rmtoll ETFLG           SOCA           LL_EPWM_IsActiveFlag_SOCA
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SOCA(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->ETFLG, EPWM_ETFLG_SOCA) == (EPWM_ETFLG_SOCA)) ? 1UL : 0UL);
}

/**
  * @brief  Clear SOCA flag. (SOCA).
  * @rmtoll ETCLR           SOCA         LL_EPWM_ClearFlag_SOCA
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearFlag_SOCA(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETCLR, EPWM_ETCLR_SOCA);
}

/**
  * @brief  Indicate whether the SOCB event (SOCB) is set.
  * @rmtoll ETFLG           SOCB           LL_EPWM_IsActiveFlag_SOCB
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SOCB(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->ETFLG, EPWM_ETFLG_SOCB) == (EPWM_ETFLG_SOCB)) ? 1UL : 0UL);
}

/**
  * @brief  Clear SOCB flag. (SOCB).
  * @rmtoll ETCLR           SOCB         LL_EPWM_ClearFlag_SOCB
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearFlag_SOCB(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->ETCLR, EPWM_ETCLR_SOCB);
}

/**
  * @brief  Enable Pre-SOC event count load.
  * @note This function enables the EPWM SOC event counter which is set by the
  *       LL_EPWM_SetADCTriggerEventCountInitValue() function to be loaded before
  *       an SOC event.
  * @note This is valid only for advanced/expanded SOC mode
  * @rmtoll ETCNTINITCTL          SOCAINTEN           LL_EPWM_EnableADCTriggerEventCountInit\n
  *         ETCNTINITCTL          SOCBINTEN           LL_EPWM_EnableADCTriggerEventCountInit
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableADCTriggerEventCountInit(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  SET_BIT(EPWMx->ETCNTINITCTL, (EPWM_ETCNTINITCTL_SOCAINTEN << isBGroup));
}

/**
  * @brief  Disable Pre-SOC event count load.
  * @note This function disables the EPWM SOC event counter from being loaded before
  *       an SOC event (only an SOC event causes an increment of the counter value).
  * @note This is valid only for advanced/expanded SOC mode
  * @rmtoll ETCNTINITCTL          SOCAINTEN           LL_EPWM_DisableADCTriggerEventCountInit\n
  *         ETCNTINITCTL          SOCBINTEN           LL_EPWM_DisableADCTriggerEventCountInit
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableADCTriggerEventCountInit(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  CLEAR_BIT(EPWMx->ETCNTINITCTL, (EPWM_ETCNTINITCTL_SOCAINTEN << isBGroup));
}

/**
  * @brief  Indicates whether Pre-SOC event count load is enabled.
  * @rmtoll ETCNTINITCTL          SOCAINTEN           LL_EPWM_IsEnabledADCTriggerEventCountInit\n
  *         ETCNTINITCTL          SOCBINTEN           LL_EPWM_IsEnabledADCTriggerEventCountInit
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledADCTriggerEventCountInit(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  return ((READ_BIT(EPWMx->ETCNTINITCTL, (EPWM_ETCNTINITCTL_SOCAINTEN << isBGroup)) == (EPWM_ETCNTINITCTL_SOCAINTEN << isBGroup)) ? 1UL : 0UL);
}

/**
  * @brief  Force a software pre SOC event counter load.
  * @note This function forces the EPWM SOC counter to be loaded with the
  *       contents set by LL_EPWM_SetPreADCStartOfConversionEventCount().
  * @note Make sure the LL_EPWM_EnableADCTriggerEventCountInit()
  *       function is called before invoking this function.
  * @rmtoll ETCNTINITCTL          SOCAINITFRC           LL_EPWM_ForceADCTriggerEventCountInit\n
  *         ETCNTINITCTL          SOCBINITFRC           LL_EPWM_ForceADCTriggerEventCountInit
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ForceADCTriggerEventCountInit(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  SET_BIT(EPWMx->ETCNTINITCTL, (EPWM_ETCNTINITCTL_SOCAINITFRC << isBGroup));
}

/**
  * @brief  Set ADC Trigger count values.
  * @rmtoll ETCNTINIT          SOCAINT           LL_EPWM_SetADCTriggerEventCountInitValue\n
  *         ETCNTINIT          SOCBINT           LL_EPWM_SetADCTriggerEventCountInitValue
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @param  eventCount the EPWM interrupt count value.
  *         The eventCount has a maximum value of 15.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetADCTriggerEventCountInitValue(EPWM_TypeDef *EPWMx, uint16_t adcSOCType, uint16_t eventCount)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  MODIFY_REG(EPWMx->ETCNTINIT, (EPWM_ETCNTINIT_SOCAINT << (isBGroup * 4U)),
  (uint16_t)(eventCount << (EPWM_ETCNTINIT_SOCAINT_Pos + isBGroup * 4U)));
}

/**
  * @brief  Get the SOC event count.
  * @rmtoll ETSOCPS          SOCACNT2           LL_EPWM_GetADCTriggerEventCount\n
  *         ETSOCPS          SOCBCNT2           LL_EPWM_GetADCTriggerEventCount
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval The SOC event counts that have occurred.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetADCTriggerEventCount(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  return (uint16_t)((READ_REG(EPWMx->ETSOCPS) >> (EPWM_ETSOCPS_SOCACNT2_Pos + isBGroup * 8U)) & 0xFU);
}

/**
  * @brief  Force SOC event.
  * @rmtoll ETFRC          SOCA           LL_EPWM_ForceADCTrigger\n
  *         ETFRC          SOCB           LL_EPWM_ForceADCTrigger
  * @param  EPWMx EPWM instance
  * @param  adcSOCType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOC_A
  *         @arg @ref LL_EPWM_SOC_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ForceADCTrigger(EPWM_TypeDef *EPWMx, uint16_t adcSOCType)
{
  uint8_t isBGroup = (uint8_t)(adcSOCType >> EPWM_ETSEL_SOCBEN_Pos);
  
  SET_BIT(EPWMx->ETFRC, EPWM_ETFRC_SOCA << isBGroup);
}

/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Digital_Compare Digital Compare configuration
  * @{
  */
/**
  * @brief  Set the DC trip input.
  * @note This function sets the trip input to the Digital Compare (DC). For a given
  *       dcType the function sets the tripSource to be the input to the DC.
  * @rmtoll DCTRIPSEL          DCAHCOMPSEL           LL_EPWM_DC_SetTripInput\n
  *         DCTRIPSEL          DCALCOMPSEL           LL_EPWM_DC_SetTripInput\n
  *         DCTRIPSEL          DCBHCOMPSEL           LL_EPWM_DC_SetTripInput\n
  *         DCTRIPSEL          DCBLCOMPSEL           LL_EPWM_DC_SetTripInput
  * @param  EPWMx EPWM instance
  * @param  tripSource This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TRIP_TRIPINx (Trip x,where x ranges from 1 to 12)
  *         @arg @ref LL_EPWM_DC_TRIP_COMBINATION
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TYPE_DCAH
  *         @arg @ref LL_EPWM_DC_TYPE_DCAL
  *         @arg @ref LL_EPWM_DC_TYPE_DCBH
  *         @arg @ref LL_EPWM_DC_TYPE_DCBL
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetTripInput(EPWM_TypeDef *EPWMx, uint16_t tripSource, uint16_t dcType)
{
  MODIFY_REG(EPWMx->DCTRIPSEL, (EPWM_DCTRIPSEL_DCAHCOMPSEL << ((uint16_t)dcType << 2U)), ((uint16_t)tripSource << ((uint16_t)dcType << 2U)));
}

/**
  * @brief  Get the DC trip input.
  * @rmtoll DCTRIPSEL          DCAHCOMPSEL           LL_EPWM_DC_GetTripInput\n
  *         DCTRIPSEL          DCALCOMPSEL           LL_EPWM_DC_GetTripInput\n
  *         DCTRIPSEL          DCBHCOMPSEL           LL_EPWM_DC_GetTripInput\n
  *         DCTRIPSEL          DCBLCOMPSEL           LL_EPWM_DC_GetTripInput
  * @param  EPWMx EPWM instance
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TYPE_DCAH
  *         @arg @ref LL_EPWM_DC_TYPE_DCAL
  *         @arg @ref LL_EPWM_DC_TYPE_DCBH
  *         @arg @ref LL_EPWM_DC_TYPE_DCBL
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TRIP_TRIPINx (Trip x,where x ranges from 1 to 12)
  *         @arg @ref LL_EPWM_DC_TRIP_COMBINATION
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetTripInput(EPWM_TypeDef *EPWMx, uint16_t dcType)
{
  return (uint16_t)((READ_REG(EPWMx->DCTRIPSEL) & (EPWM_DCTRIPSEL_DCAHCOMPSEL << (dcType << 2U))) >> (dcType << 2U));
}

/**
  * @brief  Enable DC filter blanking window.
  * @rmtoll DCFCTL          BLANKE           LL_EPWM_DC_EnableBlankingWindow
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableBlankingWindow(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKE);
}

/**
  * @brief  Disable DC filter blanking window.
  * @rmtoll DCFCTL          BLANKE           LL_EPWM_DC_DisableBlankingWindow
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableBlankingWindow(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKE);
}

/**
  * @brief  Indicates whether DC filter blanking window.
  * @rmtoll DCFCTL          BLANKE          LL_EPWM_DC_IsEnabledBlankingWindow
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledBlankingWindow(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKE) == (EPWM_DCFCTL_BLANKE)) ? 1UL : 0UL);
}

/**
  * @brief  Enable Digital Compare Window inverse mode.
  * @note This function enables the Digital Compare Window inverse mode. This will
  *       invert the blanking window.
  * @rmtoll DCFCTL          BLANKINV           LL_EPWM_DC_EnableWindowInverseMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableWindowInverseMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKINV);
}

/**
  * @brief  Disable Digital Compare Window inverse mode.
  * @rmtoll DCFCTL          BLANKINV           LL_EPWM_DC_DisableWindowInverseMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableWindowInverseMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKINV);
}

/**
  * @brief  Indicates whether Digital Compare Window inverse mode.
  * @rmtoll DCFCTL          BLANKINV          LL_EPWM_DC_IsEnabledWindowInverseMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledWindowInverseMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_BLANKINV) == (EPWM_DCFCTL_BLANKINV)) ? 1UL : 0UL);
}

/**
  * @brief  Set the Digital Compare filter blanking pulse.
  * @rmtoll DCFCTL          PULSESE           LL_EPWM_DC_SetBlankingEvent
  * @param  EPWMx EPWM instance
  * @param  blankingPulse This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_PERIOD
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_ZERO
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_ZERO_PERIOD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetBlankingEvent(EPWM_TypeDef *EPWMx, uint16_t blankingPulse)
{
  MODIFY_REG(EPWMx->DCFCTL, EPWM_DCFCTL_PULSESEL, blankingPulse);
}

/**
  * @brief  Get the Digital Compare filter blanking pulse.
  * @rmtoll DCFCTL          PULSESE           LL_EPWM_DC_GetBlankingEvent
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_PERIOD
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_ZERO
  *         @arg @ref LL_EPWM_DC_WINDOW_START_CNTR_ZERO_PERIOD
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetBlankingEvent(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCFCTL) & EPWM_DCFCTL_PULSESEL);
}

/**
  * @brief  Set up the Digital Compare filter input.
  * @rmtoll DCFCTL          SRCSEL           LL_EPWM_DC_SetFilterInput
  * @param  EPWMx EPWM instance
  * @param  filterInput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCAEVT1
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCAEVT2
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCBEVT1
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCBEVT2
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetFilterInput(EPWM_TypeDef *EPWMx, uint16_t filterInput)
{
  MODIFY_REG(EPWMx->DCFCTL, EPWM_DCFCTL_SRCSEL, filterInput);
}

/**
  * @brief  Get the Digital Compare filter input.
  * @rmtoll DCFCTL          SRCSEL           LL_EPWM_DC_GetFilterInput
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCAEVT1
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCAEVT2
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCBEVT1
  *         @arg @ref LL_EPWM_DC_WINDOW_SOURCE_DCBEVT2
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetFilterInput(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCFCTL) & EPWM_DCFCTL_SRCSEL);
}

/**
  * @brief   Enable Digital Compare Edge Filter.
  * @rmtoll DCFCTL          EDGEFILTSEL           LL_EPWM_DC_EnableEdgeFilter
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableEdgeFilter(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_EDGEFILTSEL);
}

/**
  * @brief  Disable Digital Compare Edge Filter.
  * @rmtoll DCFCTL          EDGEFILTSEL           LL_EPWM_DC_DisableEdgeFilter
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableEdgeFilter(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_EDGEFILTSEL);
}

/**
  * @brief  Indicates whether Digital Compare Edge Filter is enabled.
  * @rmtoll DCFCTL          EDGEFILTSEL          LL_EPWM_DC_IsEnabledEdgeFilter
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledEdgeFilter(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCFCTL, EPWM_DCFCTL_EDGEFILTSEL) == (EPWM_DCFCTL_EDGEFILTSEL)) ? 1UL : 0UL);
}

/**
  * @brief  Set the Digital Compare Edge Filter Mode.
  * @rmtoll DCFCTL          EDGEMODE           LL_EPWM_DC_SetEdgeFilterMode
  * @param  EPWMx EPWM instance
  * @param  edgeMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_RISING
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_FALLING
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_BOTH
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetEdgeFilterMode(EPWM_TypeDef *EPWMx, uint16_t edgeMode)
{
  MODIFY_REG(EPWMx->DCFCTL, EPWM_DCFCTL_EDGEMODE, edgeMode);
}

/**
  * @brief  Get the Digital Compare Edge Filter Mode.
  * @rmtoll DCFCTL          EDGEMODE           LL_EPWM_DC_GetEdgeFilterMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_RISING
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_FALLING
  *         @arg @ref LL_EPWM_DC_EDGEFILT_MODE_BOTH
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetEdgeFilterMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCFCTL) & EPWM_DCFCTL_EDGEMODE);
}

/**
  * @brief  Set the Digital Compare Edge Filter Edge Count.
  * @rmtoll DCFCTL          EDGECOUNT           LL_EPWM_DC_SetEdgeFilterEdgeCount
  * @param  EPWMx EPWM instance
  * @param  edgeCount This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_0
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_1
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_2
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_3
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_4
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_5
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_6
  *         @arg @ref LL_EPWM_DC_EDGEFILT_EDGECNT_7
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetEdgeFilterEdgeCount(EPWM_TypeDef *EPWMx, uint16_t edgeCount)
{
  MODIFY_REG(EPWMx->DCFCTL, EPWM_DCFCTL_EDGECOUNT, edgeCount);
}

/**
  * @brief  Returns the Digital Compare Edge Filter Edge Count.
  * @note This function returns the configured Digital Compare Edge filter edge
  *       count required to generate events. It can return values from 0-7.
  * @rmtoll DCFCTL          EDGECOUNT           LL_EPWM_DC_GetEdgeFilterEdgeCount
  * @param  EPWMx EPWM instance
  * @retval Returns the configured DigitalCompare Edge filter edge count.
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetEdgeFilterEdgeCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->DCFCTL) & EPWM_DCFCTL_EDGECOUNT) >> EPWM_DCFCTL_EDGECOUNT_Pos);
}

/**
  * @brief  Returns the Digital Compare Edge filter captured edge count status.
  * @note This function returns the count of edges captured by Digital Compare Edge
  *       filter. It can return values from 0-7.
  * @rmtoll DCFCTL          EDGESTATUS           LL_EPWM_DC_GetEdgeFilterEdgeStatus
  * @param  EPWMx EPWM instance
  * @retval Returns the count of captured edges
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetEdgeFilterEdgeStatus(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->DCFCTL) & EPWM_DCFCTL_EDGESTATUS) >> EPWM_DCFCTL_EDGESTATUS_Pos);
}

/**
  * @brief  Set up the Digital Compare filter window offset
  * @note This function sets the offset between window start pulse and blanking
  *       window in TBCLK count.
  * @note The function take a 16bit count value for the offset value.
  * @rmtoll DCFOFFSET          DCFOFFSET           LL_EPWM_DC_SetWindowOffset
  * @param  EPWMx EPWM instance
  * @param  windowOffsetCount blanking window offset length.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetWindowOffset(EPWM_TypeDef *EPWMx, uint16_t windowOffsetCount)
{
  WRITE_REG(EPWMx->DCFOFFSET, windowOffsetCount);
}

/**
  * @brief  Return DC filter blanking window offset count.
  * @rmtoll DCFOFFSETCNT          DCFOFFSETCNT           LL_EPWM_DC_GetBlankingWindowOffsetCount
  * @param  EPWMx EPWM instance
  * @retval Return the Blanking Window Offset count
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetBlankingWindowOffsetCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCFOFFSETCNT));
}

/**
  * @brief  Set up the Digital Compare filter window length
  * @note This function sets up the Digital Compare filter blanking window length in
  *       TBCLK count.The function takes a 16bit count value for the window length.
  * @rmtoll DCFWINDOW          DCFWINDOW           LL_EPWM_DC_SetWindowLength
  * @param  EPWMx EPWM instance
  * @param  windowLengthCount blanking window length.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_SetWindowLength(EPWM_TypeDef *EPWMx, uint16_t windowLengthCount)
{
  WRITE_REG(EPWMx->DCFWINDOW, windowLengthCount);
}

/**
  * @brief  Return DC filter blanking window length count.
  * @rmtoll DCFWINDOWCNT          DCFWINDOWCNT           LL_EPWM_DC_GetBlankingWindowLengthCount
  * @param  EPWMx EPWM instance
  * @retval Return the Blanking Window Length count
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetBlankingWindowLengthCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCFWINDOWCNT));
}

/**
  * @brief  Set up the Digital Compare Event source.
  * @rmtoll DCACTL          EVT1SRCSEL           LL_EPWM_DC_ConfigEventSource\n
  * @rmtoll DCACTL          EVT2SRCSEL           LL_EPWM_DC_ConfigEventSource\n
  * @rmtoll DCBCTL          EVT1SRCSEL           LL_EPWM_DC_ConfigEventSource\n
  * @rmtoll DCBCTL          EVT2SRCSEL           LL_EPWM_DC_ConfigEventSource
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @param  dcEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EVENT_1
  *         @arg @ref LL_EPWM_DC_EVENT_2
  * @param  dcEventSource This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EVENT_SOURCE_FILT_SIGNAL
  *                   The signal source for this option is DCxEVTy, where the
  *                   value of x is dependent on dcModule and the value of y is
  *                   dependent on dcEvent. Possible signal sources are DCAEVT1,
  *                   DCBEVT1, DCAEVT2 or DCBEVT2 depending on the value of both
  *                   dcModule and dcEvent.
  *         @arg @ref LL_EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL
  *                   The signal source for this option is DCxEVTy.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_ConfigEventSource(EPWM_TypeDef *EPWMx, uint16_t dcModule, uint16_t dcEvent, uint16_t dcEventSource)
{
  uint8_t isEVENT2 = (uint8_t)(dcEvent >> EPWM_DCBCTL_EVT2SRCSEL_Pos);
  
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  MODIFY_REG(*pReg, (EPWM_DCACTL_EVT1SRCSEL << (isEVENT2 * 8U)), (dcEventSource << (isEVENT2 * 8U)));
}

/**
  * @brief  Set up the Digital Compare input sync mode.
  * @rmtoll DCACTL          EVT1FRCSYNCSEL           LL_EPWM_DC_ConfigEventSyncMode\n
  * @rmtoll DCACTL          EVT2FRCSYNCSEL           LL_EPWM_DC_ConfigEventSyncMode\n
  * @rmtoll DCBCTL          EVT1FRCSYNCSEL           LL_EPWM_DC_ConfigEventSyncMode\n
  * @rmtoll DCBCTL          EVT2FRCSYNCSEL           LL_EPWM_DC_ConfigEventSyncMode
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @param  dcEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EVENT_1
  *         @arg @ref LL_EPWM_DC_EVENT_2
  * @param  syncMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_EVENT_INPUT_SYNCED
  *         @arg @ref LL_EPWM_DC_EVENT_INPUT_NOT_SYNCED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_ConfigEventSyncMode(EPWM_TypeDef *EPWMx, uint16_t dcModule, uint16_t dcEvent, uint16_t syncMode)
{
  uint8_t isEVENT2 = (uint8_t)(dcEvent >> EPWM_DCBCTL_EVT2SRCSEL_Pos);
  
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  MODIFY_REG(*pReg, (EPWM_DCACTL_EVT1FRCSYNCSEL << (isEVENT2 * 8U)), (syncMode << (isEVENT2 * 8U)));
}

/**
  * @brief  Enable Digital Compare to generate Start of Conversion.
  * @rmtoll DCACTL          EVT1SOCE           LL_EPWM_DC_EnableADCTrigger\n
  *         DCBCTL          EVT1SOCE           LL_EPWM_DC_EnableADCTrigger
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableADCTrigger(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  SET_BIT(*pReg, EPWM_DCACTL_EVT1SOCE);
}

/**
  * @brief  Disable Digital Compare to generate Start of Conversion.
  * @rmtoll DCACTL          EVT1SOCE           LL_EPWM_DC_DisableADCTrigger\n
  *         DCBCTL          EVT1SOCE           LL_EPWM_DC_DisableADCTrigger
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableADCTrigger(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  CLEAR_BIT(*pReg, EPWM_DCACTL_EVT1SOCE);
}

/**
  * @brief  Indicates whether Digital Compare to generate Start of Conversion is enabled.
  * @rmtoll DCACTL          EVT1SOCE           LL_EPWM_DC_IsEnabledADCTrigger\n
  *         DCBCTL          EVT1SOCE           LL_EPWM_DC_IsEnabledADCTrigger
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledADCTrigger(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  return ((READ_BIT(*pReg, EPWM_DCACTL_EVT1SOCE) == (EPWM_DCACTL_EVT1SOCE)) ? 1UL : 0UL);
}

/**
  * @brief  Enable Digital Compare to generate sync out pulse.
  * @rmtoll DCACTL          EVT1SYNCE           LL_EPWM_DC_EnableSyncEvent\n
  *         DCBCTL          EVT1SYNCE           LL_EPWM_DC_EnableSyncEvent
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableSyncEvent(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  SET_BIT(*pReg, EPWM_DCACTL_EVT1SYNCE);
}

/**
  * @brief  Disable Digital Compare to generate sync out pulse.
  * @rmtoll DCACTL          EVT1SYNCE           LL_EPWM_DC_DisableSyncEvent\n
  *         DCBCTL          EVT1SYNCE           LL_EPWM_DC_DisableSyncEvent
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableSyncEvent(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  CLEAR_BIT(*pReg, EPWM_DCACTL_EVT1SYNCE);
}

/**
  * @brief  Indicates whether Digital Compare to generate sync out pulse is enabled.
  * @rmtoll DCACTL          EVT1SYNCE           LL_EPWM_DC_IsEnabledSyncEvent\n
  *         DCBCTL          EVT1SYNCE           LL_EPWM_DC_IsEnabledSyncEvent
  * @param  EPWMx EPWM instance
  * @param  dcModule This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_MODULE_A
  *         @arg @ref LL_EPWM_DC_MODULE_B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledSyncEvent(EPWM_TypeDef *EPWMx, uint16_t dcModule)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCACTL) + OFFSET_TAB_DCxCTL[dcModule]));
  return ((READ_BIT(*pReg, EPWM_DCACTL_EVT1SYNCE) == (EPWM_DCACTL_EVT1SYNCE)) ? 1UL : 0UL);
}

/**
  * @brief  Enables the Time Base Counter Capture controller.
  * @rmtoll DCCAPCTL          CAPE           LL_EPWM_DC_EnableCounterCapture
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableCounterCapture(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPE);
}

/**
  * @brief  Disables the Time Base Counter Capture controller.
  * @rmtoll DCCAPCTL          CAPE           LL_EPWM_DC_DisablesCounterCapture
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisablesCounterCapture(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPE);
}

/**
  * @brief  Indicates whether the Time Base Counter Capture controller is enabled.
  * @rmtoll DCCAPCTL          CAPE           LL_EPWM_DC_IsEnabledCounterCapture
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledCounterCapture(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPE) == (EPWM_DCCAPCTL_CAPE)) ? 1UL : 0UL);
}

/**
  * @brief  Enables the Digital Compare Counter Shadow Mode
  * @note CPU reads of the DCCAP register will return the shadow register contents.
  * @rmtoll DCCAPCTL          SHDWMODE           LL_EPWM_DC_EnableCounterShadowMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableCounterShadowMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_SHDWMODE);
}

/**
  * @brief  Disables the Digital Compare Counter Shadow Mode
  * @note CPU reads of the DCCAP register will return the active register contents.
  * @rmtoll DCCAPCTL          SHDWMODE           LL_EPWM_DC_DisablesCounterShadowMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisablesCounterShadowMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_SHDWMODE);
}

/**
  * @brief  Indicates whether the Digital Compare Counter Shadow Mode is enabled.
  * @rmtoll DCCAPCTL          SHDWMODE           LL_EPWM_DC_IsEnabledCounterShadowMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledCounterShadowMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_SHDWMODE) == (EPWM_DCCAPCTL_SHDWMODE)) ? 1UL : 0UL);
}

/**
  * @brief  Indicate whether the DC Capture event (CAPSTS) is set.
  * @rmtoll DCCAPCTL           CAPSTS           LL_EPWM_DC_IsActiveFlag_CAPSTS
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsActiveFlag_CAPSTS(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPSTS) == (EPWM_DCCAPCTL_CAPSTS)) ? 1UL : 0UL);
}

/**
  * @brief  Clear DC capture latched status flag(CAPSTS)
  * @rmtoll DCCAPCTL           CAPCLR         LL_EPWM_DC_ClearFlag_CAPSTS
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_ClearFlag_CAPSTS(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPCLR);
}

/**
  * @brief  Enables the Digital Compare Counter Capture Mode
  * @note The TBCNT value is captured in active register on occurance of DCEVTFILT event.
  *       The trip events are ignored until next PRD or ZRO event re-triggers the capture
  *       mechanism.
  * @rmtoll DCCAPCTL          CAPMODE           LL_EPWM_DC_EnableCounterCaptureMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableCounterCaptureMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPMODE);
}

/**
  * @brief  Disables the Digital Compare Counter Capture Mode
  * @note The TBCNT value is captured, CAPSTS flag is set and further
  *       trips are ignored until CAPSTS bit is cleared.
  * @rmtoll DCCAPCTL          CAPMODE           LL_EPWM_DC_DisablesCounterCaptureMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisablesCounterCaptureMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPMODE);
}

/**
  * @brief  Indicates whether the Digital Compare Counter Capture Mode is enabled.
  * @rmtoll DCCAPCTL          CAPMODE           LL_EPWM_DC_IsEnabledCounterCaptureMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_DC_IsEnabledCounterCaptureMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->DCCAPCTL, EPWM_DCCAPCTL_CAPMODE) == 0U) ? 1UL : 0UL);
}

/**
  * @brief  Return the DC Time Base Counter capture value.
  * @rmtoll DCCAP          DCCAP           LL_EPWM_DC_GetCaptureCount
  * @param  EPWMx EPWM instance
  * @retval Returns the DC Time Base Counter Capture count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_DC_GetCaptureCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DCCAP));
}

/**
  * @brief  Enable DC TRIP combinational input.
  * @rmtoll DCAHTRIPSEL          TRIPINPUTx           LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCALTRIPSEL          TRIPINPUTx           LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCBHTRIPSEL          TRIPINPUTx           LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCBLTRIPSEL          TRIPINPUTx           LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCTRIPSEL            DCAHCOMPSEL          LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCTRIPSEL            DCALCOMPSEL          LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCTRIPSEL            DCBHCOMPSEL          LL_EPWM_DC_EnableTripCombinationInput\n
  *         DCTRIPSEL            DCBLCOMPSEL          LL_EPWM_DC_EnableTripCombinationInput
  * @param  EPWMx EPWM instance
  * @param  tripInput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_COMBINATIONAL_TRIPINx, where x is 1,2,...12
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TYPE_DCAH
  *         @arg @ref LL_EPWM_DC_TYPE_DCAL
  *         @arg @ref LL_EPWM_DC_TYPE_DCBH
  *         @arg @ref LL_EPWM_DC_TYPE_DCBL
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_EnableTripCombinationInput(EPWM_TypeDef *EPWMx, uint16_t tripInput, uint16_t dcType)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCAHTRIPSEL) + OFFSET_TAB_DCxTRIPSEL[dcType]));
  
  SET_BIT(*pReg, tripInput);
  SET_BIT(EPWMx->DCTRIPSEL, (EPWM_DCTRIPSEL_DCAHCOMPSEL << ((uint16_t)dcType << 2U)));
}

/**
  * @brief  Disable DC TRIP combinational input.
  * @rmtoll DCAHTRIPSEL          TRIPINPUTx           LL_EPWM_DC_DisableTripCombinationInput\n
  *         DCALTRIPSEL          TRIPINPUTx           LL_EPWM_DC_DisableTripCombinationInput\n
  *         DCBHTRIPSEL          TRIPINPUTx           LL_EPWM_DC_DisableTripCombinationInput\n
  *         DCBLTRIPSEL          TRIPINPUTx           LL_EPWM_DC_DisableTripCombinationInput
  * @param  EPWMx EPWM instance
  * @param  tripInput This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_COMBINATIONAL_TRIPINx, where x is 1,2,...12
  * @param  dcType This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DC_TYPE_DCAH
  *         @arg @ref LL_EPWM_DC_TYPE_DCAL
  *         @arg @ref LL_EPWM_DC_TYPE_DCBH
  *         @arg @ref LL_EPWM_DC_TYPE_DCBL
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DC_DisableTripCombinationInput(EPWM_TypeDef *EPWMx, uint16_t tripInput, uint16_t dcType)
{
  register __IO uint16_t *pReg = (__IO uint16_t *)((uint32_t)((uint32_t)(&EPWMx->DCAHTRIPSEL) + OFFSET_TAB_DCxTRIPSEL[dcType]));
  
  CLEAR_BIT(*pReg, tripInput);
}
/**
  * @}
  */

/** @defgroup EPWM_LL_EF_Valley_Switching Valley Switching configuration
  * @{
  */
/**
  * @brief  Enable valley capture mode.
  * @rmtoll VCAPCTL          VCAPE           LL_EPWM_EnableValleyCapture
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableValleyCapture(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_VCAPE);
}

/**
  * @brief  Disable valley capture mode.
  * @rmtoll VCAPCTL          VCAPE           LL_EPWM_DisableValleyCapture
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableValleyCapture(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_VCAPE);
}

/**
  * @brief  Indicates whether valley capture mode is enabled.
  * @rmtoll VCAPCTL          VCAPE           LL_EPWM_IsEnabledValleyCapture
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledValleyCapture(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_VCAPE) == (EPWM_VCAPCTL_VCAPE)) ? 1UL : 0UL);
}

/**
  * @brief  Start valley capture mode.
  * @note Make sure you invoke LL_EPWM_SetValleyTriggerSource with the trigger
  *       variable set to LL_EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE before calling this
  *       function.
  * @rmtoll VCAPCTL          VCAPSTART           LL_EPWM_StartValleyCapture
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_StartValleyCapture(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_VCAPSTART);
}

/**
  * @brief  Set valley capture trigger.
  * @note This function sets the trigger value that initiates Valley Capture sequence
  *       Set the number of Trigger source events for starting and stopping the
  *       valley capture using LL_EPWM_SetValleyTriggerEdgeCounts().
  * @rmtoll VCAPCTL          TRIGSEL           LL_EPWM_SetValleyTriggerSource
  * @param  EPWMx EPWM instance
  * @param  trigger This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_PERIOD
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT1
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT2
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT1
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT2
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetValleyTriggerSource(EPWM_TypeDef *EPWMx, uint16_t trigger)
{
  MODIFY_REG(EPWMx->VCAPCTL, EPWM_VCAPCTL_TRIGSEL, trigger);
}

/**
  * @brief  Get valley capture trigger.
  * @rmtoll VCAPCTL          TRIGSEL           LL_EPWM_GetValleyTriggerSource
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_PERIOD
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT1
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCAEVT2
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT1
  *         @arg @ref LL_EPWM_VALLEY_TRIGGER_EVENT_DCBEVT2
  */
__STATIC_INLINE uint16_t LL_EPWM_GetValleyTriggerSource(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->VCAPCTL) & EPWM_VCAPCTL_TRIGSEL);
}

/**
  * @brief  Set valley capture trigger source count.
  * @note This function sets the number of trigger events required to start and stop
  *       the valley capture count.
  * @note Maximum values for both startCount and stopCount is 15 corresponding to the
  *       15th edge of the trigger event.
  * @rmtoll VCNTCFG          STARTEDGE           LL_EPWM_SetValleyTriggerEdgeCounts\n
  *         VCNTCFG          STOPEDGE            LL_EPWM_SetValleyTriggerEdgeCounts
  * @param  EPWMx EPWM instance
  * @param  startCount Maximum values is 15
  * @param  stopCount Maximum values is 15
  * @note A startCount value of 0 prevents starting the valley counter.
  *       A stopCount value of 0 prevents the valley counter from stopping.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetValleyTriggerEdgeCounts(EPWM_TypeDef *EPWMx, uint16_t startCount, uint16_t stopCount)
{
  MODIFY_REG(EPWMx->VCNTCFG, (EPWM_VCNTCFG_STARTEDGE | EPWM_VCNTCFG_STOPEDGE), (startCount | (stopCount << EPWM_VCNTCFG_STOPEDGE_Pos)));
}

/**
  * @brief  Enable valley switching delay.
  * @rmtoll VCAPCTL          EDGEFILTDLYSEL           LL_EPWM_EnableValleyHWDelay
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableValleyHWDelay(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_EDGEFILTDLYSEL);
}

/**
  * @brief  Disable valley switching delay.
  * @rmtoll VCAPCTL          EDGEFILTDLYSEL           LL_EPWM_DisableValleyHWDelay
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableValleyHWDelay(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_EDGEFILTDLYSEL);
}

/**
  * @brief  Indicates whether valley switching delay is enabled.
  * @rmtoll VCAPCTL          EDGEFILTDLYSEL           LL_EPWM_IsEnabledValleyHWDelay
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledValleyHWDelay(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->VCAPCTL, EPWM_VCAPCTL_EDGEFILTDLYSEL) == (EPWM_VCAPCTL_EDGEFILTDLYSEL)) ? 1UL : 0UL);
}

/**
  * @brief  Set Valley delay values.
  * @rmtoll SWVDELVAL          SWVDELVAL           LL_EPWM_SetValleySWDelayValue
  * @param  EPWMx EPWM instance
  * @param  delayOffsetValue the software defined delay offset value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetValleySWDelayValue(EPWM_TypeDef *EPWMx, uint16_t delayOffsetValue)
{
  WRITE_REG(EPWMx->SWVDELVAL, delayOffsetValue);
}

/**
  * @brief  Get Valley delay values.
  * @rmtoll SWVDELVAL          SWVDELVAL           LL_EPWM_GetValleySWDelayValue
  * @param  EPWMx EPWM instance
  * @retval the software defined delay offset value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetValleySWDelayValue(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->SWVDELVAL));
}

/**
  * @brief  Set Valley delay mode.
  * @rmtoll VCAPCTL          VDELAYDIV           LL_EPWM_SetValleyDelayDivider
  * @param  EPWMx EPWM instance
  * @param  delayMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_1_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_2_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_4_SW_DELAY
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetValleyDelayDivider(EPWM_TypeDef *EPWMx, uint16_t delayMode)
{
  MODIFY_REG(EPWMx->VCAPCTL, EPWM_VCAPCTL_VDELAYDIV, delayMode);
}

/**
  * @brief  Get Valley delay mode.
  * @rmtoll VCAPCTL          VDELAYDIV           LL_EPWM_GetValleyDelayDivider
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_1_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_2_SW_DELAY
  *         @arg @ref LL_EPWM_VALLEY_DELAY_MODE_VCNT_DELAY_SHIFT_4_SW_DELAY
  */
__STATIC_INLINE uint16_t LL_EPWM_GetValleyDelayDivider(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->VCAPCTL) & EPWM_VCAPCTL_VDELAYDIV);
}

/**
  * @brief  Indicate whether a start edge has occurred (STARTEDGESTS).
  * @rmtoll VCNTCFG           STARTEDGESTS           LL_EPWM_IsActiveFlag_STARTEDGESTS
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_STARTEDGESTS(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->VCNTCFG, EPWM_VCNTCFG_STARTEDGESTS) == (EPWM_VCNTCFG_STARTEDGESTS)) ? 1UL : 0UL);
}

/**
  * @brief  Indicate whether a stop edge has occurred (STOPEDGESTS).
  * @rmtoll VCNTCFG           STOPEDGESTS           LL_EPWM_IsActiveFlag_STOPEDGESTS
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_STOPEDGESTS(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->VCNTCFG, EPWM_VCNTCFG_STOPEDGESTS) == (EPWM_VCNTCFG_STOPEDGESTS)) ? 1UL : 0UL);
}

/**
  * @brief  Get the Valley Counter value.
  * @note This function returns the valley time base count value which is captured
  *       upon occurrence of the stop edge condition selected by
  *       LL_EPWM_SetValleyTriggerSource() and by the stopCount variable of the
  *       LL_EPWM_SetValleyTriggerEdgeCounts() function.
  * @rmtoll VCNTVAL          VCNTVAL           LL_EPWM_GetValleyCount
  * @param  EPWMx EPWM instance
  * @retval Returns the valley base time count.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetValleyCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->VCNTVAL));
}

/**
  * @brief  Get the Valley delay value.
  * @rmtoll HWVDELVAL          HWVDELVAL           LL_EPWM_GetValleyHWDelay
  * @param  EPWMx EPWM instance
  * @retval Returns the valley delay count.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetValleyHWDelay(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->HWVDELVAL));
}

/**
  * @brief  Enable Global shadow load mode.
  * @note  This function enables Global shadow to active load mode of registers.
  *        The trigger source for loading shadow to active is determined by
  *        LL_EPWM_SetGlobalLoadTrigger() function.
  * @rmtoll GLDCTL          GLD           LL_EPWM_EnableGlobalLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableGlobalLoad(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_GLD);
}

/**
  * @brief  Disable Global shadow load mode.
  * @note  This function disables Global shadow to active load mode of registers.
  *        Loading shadow to active is determined individually.
  * @rmtoll GLDCTL          GLD           LL_EPWM_DisableGlobalLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableGlobalLoad(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_GLD);
}

/**
  * @brief  Indicates whether Global shadow load mode is enabled.
  * @rmtoll GLDCTL          GLD          LL_EPWM_IsEnabledGlobalLoad
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledGlobalLoad(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_GLD) == (EPWM_GLDCTL_GLD)) ? 1UL : 0UL);
}

/**
  * @brief  Set the Global shadow load pulse.
  * @rmtoll GLDCTL          GLDMODE           LL_EPWM_SetGlobalLoadTrigger
  * @param  EPWMx EPWM instance
  * @param  loadTrigger This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_ZERO
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_GLOBAL_FORCE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetGlobalLoadTrigger(EPWM_TypeDef *EPWMx, uint16_t loadTrigger)
{
  MODIFY_REG(EPWMx->GLDCTL, EPWM_GLDCTL_GLDMODE, loadTrigger);
}

/**
  * @brief  Get the Global shadow load pulse.
  * @rmtoll GLDCTL          GLDMODE           LL_EPWM_GetGlobalLoadTrigger
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_ZERO
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_OR_CNTR_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_SYNC_CNTR_ZERO_PERIOD
  *         @arg @ref LL_EPWM_GL_LOAD_PULSE_GLOBAL_FORCE
  */
__STATIC_INLINE uint16_t LL_EPWM_GetGlobalLoadTrigger(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->GLDCTL) & EPWM_GLDCTL_GLDMODE);
}

/**
  * @brief  Set the number of Global load pulse event counts
  * @note This function sets the number of Global Load pulse events that have to
  *       occurred before a global load pulse is issued. Valid values for
  *       prescaleCount range from 0 to 7. 0 being no event (disables counter), and 7
  *       representing 7 events.
  * @rmtoll GLDCTL          GLDPRD           LL_EPWM_SetGlobalLoadEventPrescale
  * @param  EPWMx EPWM instance
  * @param  prescalePulseCount the pulse event counts.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetGlobalLoadEventPrescale(EPWM_TypeDef *EPWMx, uint16_t prescalePulseCount)
{
  MODIFY_REG(EPWMx->GLDCTL, EPWM_GLDCTL_GLDPRD, ((uint16_t)prescalePulseCount << EPWM_GLDCTL_GLDPRD_Pos));
}

/**
  * @brief  Get the number of Global load pulse event counts
  * @rmtoll GLDCTL          GLDPRD           LL_EPWM_GetGlobalLoadEventPrescale
  * @param  EPWMx EPWM instance
  * @retval prescalePulseCount the pulse event counts.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetGlobalLoadEventPrescale(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->GLDCTL) & EPWM_GLDCTL_GLDPRD) >> EPWM_GLDCTL_GLDPRD_Pos);
}

/**
  * @brief  Return the number of Global load pulse event counts
  * @note This function returns the number of Global Load pulse events that have
  *       occurred. These pulse events are set by the LL_EPWM_SetGlobalLoadTrigger()
  *       function.
  * @rmtoll GLDCTL          GLDCNT           LL_EPWM_GetGlobalLoadEventCount
  * @param  EPWMx EPWM instance
  * @retval the number of Global load pulse event counts
  */
__STATIC_INLINE uint16_t LL_EPWM_GetGlobalLoadEventCount(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->GLDCTL) & EPWM_GLDCTL_GLDCNT) >> EPWM_GLDCTL_GLDCNT_Pos);
}

/**
  * @brief  Enable continuous global shadow to active load.
  * @note  This function enables global continuous shadow to active load. Register
  *        load happens every time the event set by the
  *        LL_EPWM_SetGlobalLoadTrigger() occurs.
  * @rmtoll GLDCTL          OSHTMODE           LL_EPWM_EnableGlobalLoadOneShotMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableGlobalLoadOneShotMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_OSHTMODE);
}

/**
  * @brief  Disable continuous global shadow to active load.
  * @rmtoll GLDCTL          OSHTMODE           LL_EPWM_DisableGlobalLoadOneShotMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableGlobalLoadOneShotMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_OSHTMODE);
}

/**
  * @brief  Indicates whether continuous global shadow to active load is enabled.
  * @rmtoll GLDCTL          OSHTMODE          LL_EPWM_IsEnabledGlobalLoadOneShotMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledGlobalLoadOneShotMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->GLDCTL, EPWM_GLDCTL_OSHTMODE) == (EPWM_GLDCTL_OSHTMODE)) ? 1UL : 0UL);
}

/**
  * @brief  Set One shot global shadow to active load pulse.
  * @note  This function sets a one time global shadow to active load pulse. The pulse
  *        propagates to generate a load signal if any of the events set by
  *        LL_EPWM_SetGlobalLoadTrigger() occur.
  * @rmtoll GLDCTL2          OSHTLD           LL_EPWM_EnableGlobalLoadOneShotLatch
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableGlobalLoadOneShotLatch(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->GLDCTL2, EPWM_GLDCTL2_OSHTLD);
}

/**
  * @brief  Force a software One shot global shadow to active load pulse.
  * @rmtoll GLDCTL2          GFRCLD           LL_EPWM_ForceGlobalLoadOneShotEvent
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ForceGlobalLoadOneShotEvent(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->GLDCTL2, EPWM_GLDCTL2_GFRCLD);
}

#if defined(EPWM_HR_SUPPORT)
/**
  * @brief  Enable a register to be loaded Globally.
  * @rmtoll GLDCFG          ALL           LL_EPWM_EnableGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD_TBPRDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA_CMPAHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB_CMPBHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED_DBREDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED_DBFEDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  SET_BIT(EPWMx->GLDCFG, loadRegister);
}

/**
  * @brief  Disable a register to be loaded Globally.
  * @note This function disables the register specified by loadRegister from being
  *       loaded globally. The shadow to active load happens as specified by the
  *       register control
  * @rmtoll GLDCFG          ALL           LL_EPWM_DisableGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD_TBPRDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA_CMPAHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB_CMPBHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED_DBREDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED_DBFEDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  CLEAR_BIT(EPWMx->GLDCFG, loadRegister);
}

/**
  * @brief  Indicates whether a register to be loaded Globally is enabled.
  * @rmtoll GLDCFG          ALL          LL_EPWM_IsEnabledGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD_TBPRDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA_CMPAHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB_CMPBHR
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED_DBREDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED_DBFEDHR
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  return ((READ_BIT(EPWMx->GLDCFG, loadRegister) == (loadRegister)) ? 1UL : 0UL);
}
#else
/**
  * @brief  Enable a register to be loaded Globally.
  * @rmtoll GLDCFG          ALL           LL_EPWM_EnableGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  SET_BIT(EPWMx->GLDCFG, loadRegister);
}

/**
  * @brief  Disable a register to be loaded Globally.
  * @note This function disables the register specified by loadRegister from being
  *       loaded globally. The shadow to active load happens as specified by the
  *       register control
  * @rmtoll GLDCFG          ALL           LL_EPWM_DisableGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  CLEAR_BIT(EPWMx->GLDCFG, loadRegister);
}

/**
  * @brief  Indicates whether a register to be loaded Globally is enabled.
  * @rmtoll GLDCFG          ALL          LL_EPWM_IsEnabledGlobalLoadRegisters
  * @param  EPWMx EPWM instance
  * @param  loadRegister This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_GL_REGISTER_TBPRD
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPA
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPB
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPC
  *         @arg @ref LL_EPWM_GL_REGISTER_CMPD
  *         @arg @ref LL_EPWM_GL_REGISTER_DBRED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBFED
  *         @arg @ref LL_EPWM_GL_REGISTER_DBCTL
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLA_AQCTLA2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCTLB_AQCTLB2
  *         @arg @ref LL_EPWM_GL_REGISTER_AQCSFRC
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledGlobalLoadRegisters(EPWM_TypeDef *EPWMx, uint16_t loadRegister)
{
  return ((READ_BIT(EPWMx->GLDCFG, loadRegister) == (loadRegister)) ? 1UL : 0UL);
}
#endif

/**
  * @brief  Lock EALLOW protected register groups
  * @rmtoll EPWMLOCK          ALL           LL_EPWM_LockRegisters
  * @param  EPWMx EPWM instance
  * @param  registerGroup This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_REGISTER_GROUP_EPWM
  *         @arg @ref LL_EPWM_REGISTER_GROUP_GLOBAL_LOAD
  *         @arg @ref LL_EPWM_REGISTER_GROUP_TRIP_ZONE
  *         @arg @ref LL_EPWM_REGISTER_GROUP_TRIP_ZONE_CLEAR
  *         @arg @ref LL_EPWM_REGISTER_GROUP_DIGITAL_COMPARE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_LockRegisters(EPWM_TypeDef *EPWMx, uint32_t registerGroup)
{
  WRITE_REG(EPWMx->EPWMLOCK, (0xA5A50000UL | ((uint32_t)registerGroup)));
}

/**
  * @brief  Set emulation mode
  * @rmtoll TBCTL          FREE_SOFT           LL_EPWM_SetEmulationMode
  * @param  EPWMx EPWM instance
  * @param  emulationMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EMULATION_STOP_AFTER_NEXT_TB
  *         @arg @ref LL_EPWM_EMULATION_STOP_AFTER_FULL_CYCLE
  *         @arg @ref LL_EPWM_EMULATION_FREE_RUN
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetEmulationMode(EPWM_TypeDef *EPWMx, uint16_t emulationMode)
{
  MODIFY_REG(EPWMx->TBCTL, EPWM_TBCTL_FREE_SOFT, emulationMode);
}

/**
  * @brief  Get emulation mode
  * @rmtoll TBCTL          FREE_SOFT           LL_EPWM_GetEmulationMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_EMULATION_STOP_AFTER_NEXT_TB
  *         @arg @ref LL_EPWM_EMULATION_STOP_AFTER_FULL_CYCLE
  *         @arg @ref LL_EPWM_EMULATION_FREE_RUN
  */
__STATIC_INLINE uint16_t LL_EPWM_GetEmulationMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TBCTL) & EPWM_TBCTL_FREE_SOFT);
}

/**
  * @}
  */

#if defined(EPWM_HR_SUPPORT)
/** @defgroup EPWM_LL_EF_High_Resolution High Resolution configuration
  * @{
  */
/**
  * @brief  Sets the consolidated phase shift value in high resolution mode.
  * @note This function sets the consolidated phase shift value, that is, both TBPHS
  *       and TBPHSHR values are configured together.
  * @note Call LL_EPWM_EnablePhaseShiftLoad & LL_EPWM_EnableHRPhaseShiftLoad() functions
  *       to enable loading of the phaseCount in high resolution mode.
  * @rmtoll TBPHS          TBPHS           LL_EPWM_SetHRPhaseShift\n
  * @rmtoll TBPHS          TBPHSHR         LL_EPWM_SetHRPhaseShift
  * @param  EPWMx EPWM instance
  * @param  phaseCount the consolidated phase shift count value.
  * @note  phaseCount is a 24-bit value.
  * @note  For configuring TBPHS = 0x3C, TBPHSHR = 0x2; phaseCount = 0x3C02
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHRPhaseShift(EPWM_TypeDef *EPWMx, uint32_t phaseCount)
{
  WRITE_REG(EPWMx->TBPHS, (phaseCount << 8U));
}

/**
  * @brief  Gets the consolidated phase shift value in high resolution mode.
  * @rmtoll TBPHS          TBPHS           LL_EPWM_GetHRPhaseShift\n
  * @rmtoll TBPHS          TBPHSHR         LL_EPWM_GetHRPhaseShift
  * @param  EPWMx EPWM instance
  * @retval a 24-bit consolidated phase shift count value.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetHRPhaseShift(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)(READ_REG(EPWMx->TBPHS) >> 8U);
}

/**
  * @brief  Sets only the high resolution phase shift value.
  * @note This function sets only the high resolution phase shift(TBPHSHR) value.
  *       Call the LL_EPWM_EnableHRPhaseShiftLoad() function to enable loading of
  *       the hrPhaseCount.
  * @rmtoll TBPHS          TBPHSHR         LL_EPWM_SetHiResPhaseShiftOnly
  * @param  EPWMx EPWM instance
  * @param  hrPhaseCount the high resolution phase shift count value.
  * @note  hrPhaseCount is an 8-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResPhaseShiftOnly(EPWM_TypeDef *EPWMx, uint16_t hrPhaseCount)
{
  MODIFY_REG(EPWMx->TBPHS, EPWM_TBPHS_TBPHSHR, ((hrPhaseCount & 0xFF) << 8U));
}

/**
  * @brief  Gets only the high resolution phase shift value.
  * @rmtoll TBPHS          TBPHSHR         LL_EPWM_GetHiResPhaseShiftOnly
  * @param  EPWMx EPWM instance
  * @retval an 8-bit high resolution phase shift count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResPhaseShiftOnly(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->TBPHS) >> 8U) & 0xFF);
}

/**
  * @brief  Sets the consolidated period of time base counter used in HR mode.
  * @note This function sets the consolidated period of time base counter value
  *       (TBPRD:TBPRDHR) required in high resolution mode.
  * @note User should map the desired period or frequency of the waveform into
  *       the correct periodCount.
  * @rmtoll TBPRDHR          TBPRDHR         LL_EPWM_SetHRPeriod\n
  * @rmtoll TBPRD            TBPRD           LL_EPWM_SetHRPeriod
  * @param  EPWMx EPWM instance
  * @param  periodCount the consolidated period count value.
  * @note  periodCount is a 24 bit value.
  * @note  For configuring TBPRD = 0x3C, TBPRDHR = 0xA; periodCount = 0x3C0A
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHRPeriod(EPWM_TypeDef *EPWMx, uint32_t periodCount)
{
  WRITE_REG(EPWMx->TBPRDHR, ((periodCount & 0xff) << 8U));
  WRITE_REG(EPWMx->TBPRD, (periodCount >> 8U));
}

/**
  * @brief  Gets the consolidated time base period count used in HR mode
  * @note This function gets the consolidated time base period(TBPRD:TBPRDHR) value
  *       used in high resolution mode.
  * @rmtoll TBPRDHR          TBPRDHR           LL_EPWM_GetHRPeriod\n
  *         TBPRD            TBPRD             LL_EPWM_GetHRPeriod
  * @param  EPWMx EPWM instance
  * @retval The consolidated time base period count value.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetHRPeriod(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)(((uint32_t)READ_REG(EPWMx->TBPRD) << 8U) | ((uint32_t)READ_REG(EPWMx->TBPRDHR) >> 8U));
}

/**
  * @brief  Sets only the high resolution time base counter.
  * @note This function sets only the high resolution time base counter(TBPRDHR)
  *       value.
  * @note User should map the desired period or frequency of the waveform into
  *       the correct hrPeriodCount.
  * @rmtoll TBPRDHR          TBPRDHR         LL_EPWM_SetHiResPeriodOnly
  * @param  EPWMx EPWM instance
  * @param  hrPeriodCount the high resolution period count value.
  * @note  hrPeriodCount is an 8-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResPeriodOnly(EPWM_TypeDef *EPWMx, uint16_t hrPeriodCount)
{
  WRITE_REG(EPWMx->TBPRDHR, (hrPeriodCount << 8U));
}

/**
  * @brief Gets the only the high resolution time base period count.
  * @note This function gets only the high resolution time base period(TBPRDHR) value.
  * @rmtoll TBPRDHR          TBPRDHR           LL_EPWM_GetHiResPeriodOnly
  * @param  EPWMx EPWM instance
  * @retval The high resolution time base period count value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResPeriodOnly(EPWM_TypeDef *EPWMx)
{
  return (READ_REG(EPWMx->TBPRDHR) >> 8U);
}

/**
  * @brief  Sets the high resolution edge controlled by MEP (Micro Edge Positioner).
  * @rmtoll HRCNFG          EDGMODE           LL_EPWM_SetMEPEdgeSelect\n
  *         HRCNFG          EDGMODEB          LL_EPWM_SetMEPEdgeSelect
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @param  mepEdgeMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MEP_CTRL_DISABLE
  *         @arg @ref LL_EPWM_MEP_CTRL_RISING_EDGE
  *         @arg @ref LL_EPWM_MEP_CTRL_FALLING_EDGE
  *         @arg @ref LL_EPWM_MEP_CTRL_RISING_AND_FALLING_EDGE
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetMEPEdgeSelect(EPWM_TypeDef *EPWMx, uint16_t channel, uint16_t mepEdgeMode)
{
  MODIFY_REG(EPWMx->HRCNFG, (EPWM_HRCNFG_EDGMODE << (channel * 8U)), (mepEdgeMode << (channel * 8U)));
}

/**
  * @brief  Gets the high resolution edge controlled by MEP (Micro Edge Positioner).
  * @rmtoll HRCNFG          EDGMODE           LL_EPWM_GetMEPEdgeSelect\n
  *         HRCNFG          EDGMODEB          LL_EPWM_GetMEPEdgeSelect
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_MEP_CTRL_DISABLE
  *         @arg @ref LL_EPWM_MEP_CTRL_RISING_EDGE
  *         @arg @ref LL_EPWM_MEP_CTRL_FALLING_EDGE
  *         @arg @ref LL_EPWM_MEP_CTRL_RISING_AND_FALLING_EDGE
  */
__STATIC_INLINE uint16_t LL_EPWM_GetMEPEdgeSelect(EPWM_TypeDef *EPWMx, uint16_t channel)
{
  return (uint16_t)((READ_REG(EPWMx->HRCNFG) & (EPWM_HRCNFG_EDGMODE << (channel * 8U))) >> (channel * 8U));
}

/**
  * @brief  Sets the MEP (Micro Edge Positioner) control mode.
  * @rmtoll HRCNFG          CTLMODE           LL_EPWM_SetMEPControlMode\n
  *         HRCNFG          CTLMODEB          LL_EPWM_SetMEPControlMode
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @param  mepCtrlMode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MEP_DUTY_PERIOD_CTRL
  *         @arg @ref LL_EPWM_MEP_PHASE_CTRL
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetMEPControlMode(EPWM_TypeDef *EPWMx, uint16_t channel, uint16_t mepCtrlMode)
{
  MODIFY_REG(EPWMx->HRCNFG, (EPWM_HRCNFG_CTLMODE << (channel * 8U)), (mepCtrlMode << (channel * 8U)));
}

/**
  * @brief  Gets the MEP (Micro Edge Positioner) control mode.
  * @rmtoll HRCNFG          CTLMODE           LL_EPWM_GetMEPControlMode\n
  *         HRCNFG          CTLMODEB          LL_EPWM_GetMEPControlMode
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_MEP_DUTY_PERIOD_CTRL
  *         @arg @ref LL_EPWM_MEP_PHASE_CTRL
  */
__STATIC_INLINE uint16_t LL_EPWM_GetMEPControlMode(EPWM_TypeDef *EPWMx, uint16_t channel)
{
  return (uint16_t)((READ_REG(EPWMx->HRCNFG) & (EPWM_HRCNFG_CTLMODE << (channel * 8U))) >> (channel * 8U));
}

/**
  * @brief  Sets the high resolution comparator load mode.
  * @note This function sets the shadow load mode of the high resolution comparator.
  *       The function sets the COMPA or COMPB register depending on the channel
  *       variable.
  * @rmtoll HRCNFG          HRLOAD           LL_EPWM_SetCounterCompareShadowLoadEvent\n
  *         HRCNFG          HRLOADB          LL_EPWM_SetCounterCompareShadowLoadEvent
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @param  loadEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetCounterCompareShadowLoadEvent(EPWM_TypeDef *EPWMx, uint16_t channel, uint16_t loadEvent)
{
  MODIFY_REG(EPWMx->HRCNFG, (EPWM_HRCNFG_HRLOAD << (channel * 8U)), (loadEvent << (channel * 8U)));
}

/**
  * @brief  Gets the high resolution comparator load mode.
  * @rmtoll HRCNFG          HRLOAD           LL_EPWM_GetCounterCompareShadowLoadEvent\n
  *         HRCNFG          HRLOADB          LL_EPWM_GetCounterCompareShadowLoadEvent
  * @param  EPWMx EPWM instance
  * @param  channel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CHANNEL_A
  *         @arg @ref LL_EPWM_CHANNEL_B
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  */
__STATIC_INLINE uint16_t LL_EPWM_GetCounterCompareShadowLoadEvent(EPWM_TypeDef *EPWMx, uint16_t channel)
{
  return (uint16_t)((READ_REG(EPWMx->HRCNFG) & (EPWM_HRCNFG_HRLOAD << (channel * 8U))) >> (channel * 8U));
}

/**
  * @brief  Enables the high resolution output swap mode.
  * @note EPWMxA signal appears on EPWMxB output and
  *       EPWMxB signal appears on EPWMxA output.
  * @rmtoll HRCNFG          SWAPAB           LL_EPWM_EnableOutputSwapMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableOutputSwapMode(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_SWAPAB);
}

/**
  * @brief  Disables the high resolution output swap mode.
  * @note EPWMxA and EPWMxB outputs are unchanged.
  * @rmtoll HRCNFG          SWAPAB           LL_EPWM_DisableOutputSwapMode
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableOutputSwapMode(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_SWAPAB);
}

/**
  * @brief  Indicates whether the high resolution output swap mode enabled.
  * @rmtoll HRCNFG          SWAPAB          LL_EPWM_IsEnabledOutputSwapMode
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledOutputSwapMode(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_SWAPAB) == (EPWM_HRCNFG_SWAPAB)) ? 1UL : 0UL);
}

/**
  * @brief  Sets the high resolution output on EPWMxB
  * @note This function sets the EPWM output signal on EPWMxB. If outputOnB is
  *       LL_EPWM_OUTPUT_ON_B_INV_A, EPWMxB output is an inverted version of EPWMxA.
  *       If outputOnB is LL_EPWM_OUTPUT_ON_B_NORMAL, EPWMxB output is EPWMxB.
  * @rmtoll HRCNFG          SELOUTB           LL_EPWM_SetChannelBOutputPath
  * @param  EPWMx EPWM instance
  * @param  outputOnB This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_OUTPUT_ON_B_NORMAL
  *         @arg @ref LL_EPWM_OUTPUT_ON_B_INV_A
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetChannelBOutputPath(EPWM_TypeDef *EPWMx, uint16_t outputOnB)
{
  MODIFY_REG(EPWMx->HRCNFG, EPWM_HRCNFG_SELOUTB, outputOnB);
}

/**
  * @brief  Gets the high resolution output on EPWMxB
  * @rmtoll HRCNFG          SELOUTB           LL_EPWM_GetChannelBOutputPath
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_OUTPUT_ON_B_NORMAL
  *         @arg @ref LL_EPWM_OUTPUT_ON_B_INV_A
  */
__STATIC_INLINE uint16_t LL_EPWM_GetChannelBOutputPath(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->HRCNFG) & EPWM_HRCNFG_SELOUTB);
}

/**
  * @brief  Enables MEP (Micro Edge Positioner) automatic scale mode.
  * @note This function enables the MEP (Micro Edge Positioner) to automatically
  *       scale HRMSTEP.
  * @note The SFO library will calculate required MEP steps per coarse steps and
  *       feed it to HRMSTEP register. The MEP calibration module will use the value
  *       in HRMSTEP to determine appropriate number of MEP steps represented by
  *       fractional duty cycle.
  * @rmtoll HRCNFG          AUTOCONV           LL_EPWM_EnableAutoConversion
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableAutoConversion(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_AUTOCONV);
}

/**
  * @brief  Disables MEP (Micro Edge Positioner) automatic scale mode.
  * @rmtoll HRCNFG          AUTOCONV           LL_EPWM_DisableAutoConversion
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableAutoConversion(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_AUTOCONV);
}

/**
  * @brief  Indicates whether MEP (Micro Edge Positioner) automatic scale mode is enabled.
  * @rmtoll HRCNFG          AUTOCONV          LL_EPWM_IsEnabledAutoConversion
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledAutoConversion(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->HRCNFG, EPWM_HRCNFG_AUTOCONV) == (EPWM_HRCNFG_AUTOCONV)) ? 1UL : 0UL);
}

/**
  * @brief  Enable high resolution period feature.
  * @rmtoll HRPCTL          HRPE           LL_EPWM_EnablePeriodControl
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnablePeriodControl(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_HRPE);
}

/**
  * @brief  Disable high resolution period feature.
  * @rmtoll HRPCTL          HRPE           LL_EPWM_DisablePeriodControl
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisablePeriodControl(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_HRPE);
}

/**
  * @brief  Indicates whether high resolution period feature is enabled.
  * @rmtoll HRPCTL          HRPE          LL_EPWM_IsEnabledPeriodControl
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledPeriodControl(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_HRPE) == (EPWM_HRPCTL_HRPE)) ? 1UL : 0UL);
}

/**
  * @brief  Enable high resolution phase load
  * @note This function enables loading of high resolution phase shift value which is
  *       set by the function LL_EPWM_SetHRPhaseShift().
  * @rmtoll HRPCTL          TBPHSHRLOADE           LL_EPWM_EnableHRPhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableHRPhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  SET_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_TBPHSHRLOADE);
}

/**
  * @brief  Disable high resolution phase load
  * @note This function disables loading of high resolution phase shift value.
  * @rmtoll HRPCTL          TBPHSHRLOADE           LL_EPWM_DisableHRPhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableHRPhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  CLEAR_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_TBPHSHRLOADE);
}

/**
  * @brief  Indicates whether high resolution phase load is enabled.
  * @rmtoll HRPCTL          TBPHSHRLOADE          LL_EPWM_IsEnabledHRPhaseShiftLoad
  * @param  EPWMx EPWM instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledHRPhaseShiftLoad(EPWM_TypeDef *EPWMx)
{
  return ((READ_BIT(EPWMx->HRPCTL, EPWM_HRPCTL_TBPHSHRLOADE) == (EPWM_HRPCTL_TBPHSHRLOADE)) ? 1UL : 0UL);
}

/**
  * @brief  Set high resolution PWMSYNC source.
  * @rmtoll HRPCTL          EPWMSYNCSEL           LL_EPWM_SetSyncPulseSource\n
  *         HRPCTL          EPWMSYNCSELX          LL_EPWM_SetSyncPulseSource
  * @param  EPWMx EPWM instance
  * @param  syncPulseSource This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_PERIOD
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_ZERO
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPC_UP
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPC_DOWN
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPD_UP
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPD_DOWN
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSyncPulseSource(EPWM_TypeDef *EPWMx, uint16_t syncPulseSource)
{
  MODIFY_REG(EPWMx->HRPCTL, (EPWM_HRPCTL_EPWMSYNCSELX | EPWM_HRPCTL_EPWMSYNCSEL), syncPulseSource);
}

/**
  * @brief  Get high resolution PWMSYNC source.
  * @rmtoll HRPCTL          EPWMSYNCSEL           LL_EPWM_GetSyncPulseSource\n
  *         HRPCTL          EPWMSYNCSELX          LL_EPWM_GetSyncPulseSource
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_PERIOD
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_ZERO
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPC_UP
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPC_DOWN
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPD_UP
  *         @arg @ref LL_EPWM_PWMSYNC_SOURCE_COMPD_DOWN
  */
__STATIC_INLINE uint16_t LL_EPWM_GetSyncPulseSource(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->HRPCTL) & (EPWM_HRPCTL_EPWMSYNCSELX | EPWM_HRPCTL_EPWMSYNCSEL));
}

/**
  * @brief  Sets the Translator Remainder value.
  * @rmtoll TRREM          TREEM           LL_EPWM_SetTranslatorRemainder
  * @param  EPWMx EPWM instance
  * @param  trremVal the translator remainder value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetTranslatorRemainder(EPWM_TypeDef *EPWMx, uint16_t trremVal)
{
  WRITE_REG(EPWMx->TRREM, (trremVal & EPWM_TRREM_TREEM));
}


/**
  * @brief  Gets the Translator Remainder value.
  * @rmtoll TRREM          TREEM           LL_EPWM_GetTranslatorRemainder
  * @param  EPWMx EPWM instance
  * @retval the translator remainder value.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetTranslatorRemainder(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->TRREM));
}

/**
  * @brief  Set the consolidated counter compare A values in HR mode.
  * @note This function sets the consolidated counter compare(CMPx:CMPxHR) value
  *       required in high resolution mode for counter compare registers.
  * @rmtoll CMPA          CMPA           LL_EPWM_SetHRCompareA\n
  *         CMPA          CMPAHR         LL_EPWM_SetHRCompareA
  * @param  EPWMx EPWM instance
  * @param  compCount the consolidated counter compare count value.
  * @note compCount is a 24 bit value.
          For configuring CMPA = 0xB4, CMPAHR = 0x64; value of compCount = 0xB464
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHRCompareA(EPWM_TypeDef *EPWMx, uint32_t compCount)
{
  WRITE_REG(EPWMx->CMPA, (compCount << 8U));
}

/**
  * @brief  Set the consolidated counter compare B values in HR mode.
  * @note This function sets the consolidated counter compare(CMPx:CMPxHR) value
  *       required in high resolution mode for counter compare registers.
  * @rmtoll CMPB          CMPB           LL_EPWM_SetHRCompareB\n
  *         CMPB          CMPBHR         LL_EPWM_SetHRCompareB
  * @param  EPWMx EPWM instance
  * @param  compCount the consolidated counter compare count value.
  * @note compCount is a 24 bit value.
          For configuring CMPB = 0xB4, CMPBHR = 0x64; value of compCount = 0xB464
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHRCompareB(EPWM_TypeDef *EPWMx, uint32_t compCount)
{
  WRITE_REG(EPWMx->CMPB, (compCount << 8U));
}

/**
  * @brief  Sets only the high resolution counter compare A value.
  * @note This function sets the high resolution counter compare value(CMPxHR) for
  *       counter compare registers.
  * @rmtoll CMPA          CMPAHR         LL_EPWM_SetHiResCompareAOnly
  * @param  EPWMx EPWM instance
  * @param  hrCompCount the high resolution counter compare count value.
  * @note hrCompCount is an 8-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResCompareAOnly(EPWM_TypeDef *EPWMx, uint16_t hrCompCount)
{
  MODIFY_REG(EPWMx->CMPA, EPWM_CMPA_CMPAHR, ((hrCompCount & 0xFF) << 8U));
}

/**
  * @brief  Sets only the high resolution counter compare B value.
  * @note This function sets the high resolution counter compare value(CMPxHR) for
  *       counter compare registers.
  * @rmtoll CMPB          CMPBHR         LL_EPWM_SetHiResCompareBOnly
  * @param  EPWMx EPWM instance
  * @param  hrCompCount the high resolution counter compare count value.
  * @note hrCompCount is an 8-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResCompareBOnly(EPWM_TypeDef *EPWMx, uint16_t hrCompCount)
{
  MODIFY_REG(EPWMx->CMPB, EPWM_CMPB_CMPBHR, ((hrCompCount & 0xFF) << 8U));
}

/**
  * @brief  Gets the consolidated counter compare A values.
  * @note This function gets the consolidated counter compare(CMPx:CMPxHR) value
  *       used in high resolution for the counter compare module specified.
  * @rmtoll CMPA          CMPA           LL_EPWM_GetHRCompareA\n
  *         CMPA          CMPAHR         LL_EPWM_GetHRCompareA
  * @param  EPWMx EPWM instance
  * @retval the consolidated counter compare values.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetHRCompareA(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)(READ_REG(EPWMx->CMPA) >> 8U);
}

/**
  * @brief  Gets the consolidated counter compare B values.
  * @note This function gets the consolidated counter compare(CMPx:CMPxHR) value
  *       used in high resolution for the counter compare module specified.
  * @rmtoll CMPB          CMPB           LL_EPWM_GetHRCompareB\n
  *         CMPB          CMPBHR         LL_EPWM_GetHRCompareB
  * @param  EPWMx EPWM instance
  * @retval the consolidated counter compare values.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetHRCompareB(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)(READ_REG(EPWMx->CMPB) >> 8U);
}

/**
  * @brief  Gets only the high resolution counter compare A values.
  * @note This function gets only the high resolution counter compare(CMPxHR) value
  *       for the counter compare module specified.
  * @rmtoll CMPA          CMPAHR         LL_EPWM_GetHiResCompareAOnly
  * @param  EPWMx EPWM instance
  * @retval only the high resolution counter compare values.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResCompareAOnly(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->CMPA) & EPWM_CMPA_CMPAHR) >> 8U);
}

/**
  * @brief  Gets only the high resolution counter compare B values.
  * @note This function gets only the high resolution counter compare(CMPxHR) value
  *       for the counter compare module specified.
  * @rmtoll CMPB          CMPBHR         LL_EPWM_GetHiResCompareBOnly
  * @param  EPWMx EPWM instance
  * @retval only the high resolution counter compare values.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResCompareBOnly(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->CMPB) & EPWM_CMPB_CMPBHR) >> 8U);
}

/**
  * @brief  Sets the consolidated RED count in high resolution mode.
  * @note This function sets the consolidated RED (Rising Edge Delay) count
  *       (DBRED:DBREDHR) value used in high resolution mode. The value of
  *        redCount should be less than 0x200000.
  * @rmtoll DBREDHR          DBREDHR         LL_EPWM_SetRisingEdgeDelay\n
  *         DBRED            DBRED           LL_EPWM_SetRisingEdgeDelay
  * @param  EPWMx EPWM instance
  * @param  redCount the high resolution RED count.
  * @note redCount is a 21 bit value.
  *       For configuring DBRED = 0x4, DBREDHR = 0x1; value of redCount = ((0x4 << 7) | 0x1) = 0x201
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetRisingEdgeDelay(EPWM_TypeDef *EPWMx, uint32_t redCount)
{
  WRITE_REG(EPWMx->DBREDHR, ((redCount & 0x7f) << EPWM_DBREDHR_DBREDHR_Pos));
  WRITE_REG(EPWMx->DBRED, (redCount >> 7U));
}

/**
  * @brief  Gets the consolidated RED count in high resolution mode.
  * @rmtoll DBREDHR          DBREDHR         LL_EPWM_GetRisingEdgeDelay\n
  *         DBRED            DBRED           LL_EPWM_GetRisingEdgeDelay
  * @param  EPWMx EPWM instance
  * @retval a 21 bit high resolution RED count.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetRisingEdgeDelay(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)((READ_REG(EPWMx->DBREDHR) >> EPWM_DBREDHR_DBREDHR_Pos) | (READ_REG(EPWMx->DBRED) << 7U));
}

/**
  * @brief  Sets the high resolution RED count only.
  * @note This function sets only the high resolution RED (Rising Edge Delay)
  *       count(DBREDHR) value.
  *       The value of hrRedCount should be less than 128.
  * @rmtoll DBREDHR          DBREDHR         LL_EPWM_SetHiResREDOnly
  * @param  EPWMx EPWM instance
  * @param  hrRedCount the high resolution RED count.
  * @note hrRedCount is a 7-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResREDOnly(EPWM_TypeDef *EPWMx, uint16_t hrRedCount)
{
  WRITE_REG(EPWMx->DBREDHR, (hrRedCount << EPWM_DBREDHR_DBREDHR_Pos));
}

/**
  * @brief  Gets the high resolution RED count only.
  * @rmtoll DBREDHR          DBREDHR         LL_EPWM_GetHiResREDOnly
  * @param  EPWMx EPWM instance
  * @retval a 7-bit value high resolution RED count.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResREDOnly(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBREDHR) >> EPWM_DBREDHR_DBREDHR_Pos);
}

/**
  * @brief  Sets the consolidated FED value in high resolution mode.
  * @note This function sets the consolidated FED (Falling Edge Delay) count
  *       (DBFED: DBFEDHR) value used in high resolution mode. The value of fedCount
  *        should be less than 0x200000.
  * @rmtoll DBFEDHR          DBFEDHR         LL_EPWM_SetFallingEdgeDelay\n
  *         DBFED            DBFED           LL_EPWM_SetFallingEdgeDelay
  * @param  EPWMx EPWM instance
  * @param  fedCount the high resolution FED count.
  * @note fedCount is a 21 bit value.
  *       For configuring DBFED = 0x4, DBFEDHR = 0x1; value of fedCount = ((0x4 << 7) | 0x1) = 0x201
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetFallingEdgeDelay(EPWM_TypeDef *EPWMx, uint32_t fedCount)
{
  WRITE_REG(EPWMx->DBFEDHR, ((fedCount & 0x7f) << EPWM_DBFEDHR_DBFEDHR_Pos));
  WRITE_REG(EPWMx->DBFED, (fedCount >> 7U));
}

/**
  * @brief  Gets the consolidated FED value in high resolution mode.
  * @rmtoll DBFEDHR          DBFEDHR         LL_EPWM_GetFallingEdgeDelay\n
  *         DBFED            DBFED           LL_EPWM_GetFallingEdgeDelay
  * @param  EPWMx EPWM instance
  * @retval a 21 bit high resolution FED count.
  */
__STATIC_INLINE uint32_t LL_EPWM_GetFallingEdgeDelay(EPWM_TypeDef *EPWMx)
{
  return (uint32_t)((READ_REG(EPWMx->DBFEDHR) >> EPWM_DBFEDHR_DBFEDHR_Pos) | (READ_REG(EPWMx->DBFED) << 7U));
}

/**
  * @brief  Sets high resolution FED count only.
  * @note This function sets only the high resolution FED (Falling Edge Delay) count
  *       (DBFEDHR)value. The value of hrFedCount should be less than 128.
  * @rmtoll DBFEDHR          DBFEDHR         LL_EPWM_SetHiResFEDOnly
  * @param  EPWMx EPWM instance
  * @param  hrFedCount the high resolution FED count.
  * @note hrFedCount is a 7-bit value.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHiResFEDOnly(EPWM_TypeDef *EPWMx, uint16_t hrFedCount)
{
  WRITE_REG(EPWMx->DBFEDHR, (hrFedCount << EPWM_DBFEDHR_DBFEDHR_Pos));
}

/**
  * @brief  Gets high resolution FED count only.
  * @rmtoll DBFEDHR          DBFEDHR         LL_EPWM_GetHiResFEDOnly
  * @param  EPWMx EPWM instance
  * @retval a 7-bit high resolution FED count.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetHiResFEDOnly(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->DBFEDHR) >> EPWM_DBFEDHR_DBFEDHR_Pos);
}

/**
  * @brief  Set high resolution MEP (Micro Edge Positioner) step.
  * @rmtoll HRMSTEP          HRMSTEP           LL_EPWM_SetMEPStep
  * @param  EPWMx EPWM instance
  * @param  mepCount the high resolution MEP (Micro Edge Positioner) step count.
  *         The maximum value for the MEP count step is 255.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetMEPStep(EPWM_TypeDef *EPWMx, uint16_t mepCount)
{
  MODIFY_REG(EPWMx->HRMSTEP, EPWM_HRMSTEP_HRMSTEP, mepCount);
}

/**
  * @brief  Get high resolution MEP (Micro Edge Positioner) step.
  * @rmtoll HRMSTEP          HRMSTEP           LL_EPWM_GetMEPStep
  * @param  EPWMx EPWM instance
  * @retval the high resolution MEP (Micro Edge Positioner) step count.
  *         The maximum value for the MEP count step is 255.
  */
__STATIC_INLINE uint16_t LL_EPWM_GetMEPStep(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->HRMSTEP) & EPWM_HRMSTEP_HRMSTEP);
}

/**
  * @brief  Set high resolution Dead Band MEP (Micro Edge Positioner) control.
  * @rmtoll HRCNFG2          EDGMODEDB           LL_EPWM_SetDeadbandMEPEdgeSelect
  * @param  EPWMx EPWM instance
  * @param  mepDBEdge This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_DISABLE
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_RED
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_FED
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_RED_FED
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetDeadbandMEPEdgeSelect(EPWM_TypeDef *EPWMx, uint16_t mepDBEdge)
{
  MODIFY_REG(EPWMx->HRCNFG2, EPWM_HRCNFG2_EDGMODEDB, mepDBEdge);
}

/**
  * @brief  Get high resolution Dead Band MEP (Micro Edge Positioner) control.
  * @rmtoll HRCNFG2          EDGMODEDB           LL_EPWM_GetDeadbandMEPEdgeSelect
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_DISABLE
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_RED
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_FED
  *         @arg @ref LL_EPWM_DB_MEP_CTRL_RED_FED
  */
__STATIC_INLINE uint16_t LL_EPWM_GetDeadbandMEPEdgeSelect(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)(READ_REG(EPWMx->HRCNFG2) & EPWM_HRCNFG2_EDGMODEDB);
}

/**
  * @brief  Set the high resolution Dead Band RED load mode.
  * @rmtoll HRCNFG2          CTLMODEDBRED           LL_EPWM_SetREDLoadMode
  * @param  EPWMx EPWM instance
  * @param  loadEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetREDLoadMode(EPWM_TypeDef *EPWMx, uint16_t loadEvent)
{
  MODIFY_REG(EPWMx->HRCNFG2, EPWM_HRCNFG2_CTLMODEDBRED, ((loadEvent >> EPWM_HRCNFG_HRLOAD_Pos) << EPWM_HRCNFG2_CTLMODEDBRED_Pos));
}

/**
  * @brief  Get the high resolution Dead Band RED load mode.
  * @rmtoll HRCNFG2          CTLMODEDBRED           LL_EPWM_GetREDLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  */
__STATIC_INLINE uint16_t LL_EPWM_GetREDLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->HRCNFG2) & EPWM_HRCNFG2_CTLMODEDBRED) >> EPWM_HRCNFG2_CTLMODEDBRED_Pos << EPWM_HRCNFG_HRLOAD_Pos);
}

/**
  * @brief  Set the high resolution Dead Band FED load mode.
  * @rmtoll HRCNFG2          CTLMODEDBFED           LL_EPWM_SetFEDLoadMode
  * @param  EPWMx EPWM instance
  * @param  loadEvent This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetFEDLoadMode(EPWM_TypeDef *EPWMx, uint16_t loadEvent)
{
  MODIFY_REG(EPWMx->HRCNFG2, EPWM_HRCNFG2_CTLMODEDBFED, ((loadEvent >> EPWM_HRCNFG_HRLOAD_Pos) << EPWM_HRCNFG2_CTLMODEDBFED_Pos));
}

/**
  * @brief  Get the high resolution Dead Band FED load mode.
  * @rmtoll HRCNFG2          CTLMODEDBFED           LL_EPWM_GetFEDLoadMode
  * @param  EPWMx EPWM instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_PERIOD
  *         @arg @ref LL_EPWM_LOAD_ON_CNTR_ZERO_PERIOD
  */
__STATIC_INLINE uint16_t LL_EPWM_GetFEDLoadMode(EPWM_TypeDef *EPWMx)
{
  return (uint16_t)((READ_REG(EPWMx->HRCNFG2) & EPWM_HRCNFG2_CTLMODEDBFED) >> EPWM_HRCNFG2_CTLMODEDBFED_Pos << EPWM_HRCNFG_HRLOAD_Pos);
}
/**
  * @}
  */
#endif

/** @defgroup EPWM_LL_EF_XBAR XBAR configuration
  * @{
  */
/**
  * @brief  Select the input xbar source.
  * @rmtoll IXBSEL1_2             ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL3_4             ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL5_6             ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL7_8             ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL9_10            ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL11_12           ALL        LL_EPWM_SetIXBARSource\n
  *         IXBSEL13_14           ALL        LL_EPWM_SetIXBARSource
  * @param  EPWMc EPWMC instance
  * @param  INPUTSELx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_IXBAR_INPUTSELx(where x can be 1 to 14)
  * @param  IXBSource This parameter can be from 0x00 to 0x3b
  *                   which correspond EPWM_IN0 to EPWM_IN59
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetIXBARSource(EPWMC_TypeDef *EPWMc, uint32_t INPUTSELx, uint32_t IXBSource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->IXBSEL1_2) + OFFSET_TAB_IXBx[(INPUTSELx >> 1U)]));
  MODIFY_REG(*pReg, (EPWM_IXBSEL1_2_INPUTSEL1 << ((INPUTSELx & 0x1U) * 16U)), (IXBSource << ((INPUTSELx & 0x1U) * 16U)));
}

/**
  * @brief  Set the INPUT XBAR mode.
  * @rmtoll IXBAQSEL           ALL        LL_EPWM_SetIXBAQMode
  * @param  EPWMc EPWMC instance
  * @param  AQSELx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_IXB_AQSELx(where x can be 1 to 14)
  * @param  Mode This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_IXB_AQSEL_SYNC
  *         @arg @ref LL_EPWM_IXB_AQSEL_SAMP3
  *         @arg @ref LL_EPWM_IXB_AQSEL_SAMP6
  *         @arg @ref LL_EPWM_IXB_AQSEL_ASYNC
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetIXBAQMode(EPWMC_TypeDef *EPWMc, uint32_t AQSELx, uint32_t Mode)
{
  MODIFY_REG(EPWMc->IXBAQSEL, (EPWM_IXBAQSEL_AQSEL1 << AQSELx), (Mode << AQSELx));
}

/**
  * @brief  Get the INPUT XBAR mode.
  * @rmtoll IXBAQSEL           ALL        LL_EPWM_GetIXBAQMode
  * @param  EPWMc EPWMC instance
  * @param  AQSELx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_IXB_AQSELx(where x can be 1 to 14)
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_IXB_AQSEL_SYNC
  *         @arg @ref LL_EPWM_IXB_AQSEL_SAMP3
  *         @arg @ref LL_EPWM_IXB_AQSEL_SAMP6
  *         @arg @ref LL_EPWM_IXB_AQSEL_ASYNC
  */
__STATIC_INLINE uint32_t LL_EPWM_GetIXBAQMode(EPWMC_TypeDef *EPWMc, uint32_t AQSELx)
{
  return (uint32_t)((READ_REG(EPWMc->IXBAQSEL) & (EPWM_IXBAQSEL_AQSEL1 << AQSELx)) >> AQSELx);
}

/**
  * @brief  Locks the EPWM IXB
  * @rmtoll IXBSEL_LOCK          ALL           LL_EPWM_LockIXB
  * @param  EPWMc EPWMC instance
  * @param  locksel This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_IXB_LOCKx(where x can be from 1 to 14)
  *         @arg @ref LL_EPWM_IXB_FILTERLOCK
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_LockIXB(EPWMC_TypeDef *EPWMc, uint32_t locksel)
{
  SET_BIT(EPWMc->IXBSEL_LOCK, locksel);
}

/**
  * @brief  Sets EPWM input xbar input sampling period.
  * @rmtoll IXBCTRL         ISAPRD0               LL_EPWM_SetIXBPeriod\n
  *         IXBCTRL         ISAPRD1               LL_EPWM_SetIXBPeriod
  * @param  EPWMc EPWMC instance
  * @param  inputxbar This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_PRD_IXB0_7
  *         @arg @ref LL_EPWM_PRD_IXB8_14
  * @param  Period This parameter can be from 0x00 to 0xFF
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetIXBPeriod(EPWMC_TypeDef *EPWMc, uint32_t inputxbar, uint32_t Period)
{
  MODIFY_REG(EPWMc->IXBCTRL, (EPWM_IXBCTRL_ISAPRD0 << inputxbar), (Period << inputxbar));
}

/**
  * @brief  Get EPWM input xbar input sampling period.
  * @rmtoll IXBCTRL         ISAPRD0               LL_EPWM_GetIXBPeriod\n
  *         IXBCTRL         ISAPRD1               LL_EPWM_GetIXBPeriod
  * @param  EPWMc EPWMC instance
  * @param  inputxbar This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_PRD_IXB0_7
  *         @arg @ref LL_EPWM_PRD_IXB8_14
  * @retval input xbar input sampling period from 0x00 to 0xFF
  */
__STATIC_INLINE uint32_t LL_EPWM_GetIXBPeriod(EPWMC_TypeDef *EPWMc, uint32_t inputxbar)
{
  return (uint32_t)((READ_REG(EPWMc->IXBCTRL) & (EPWM_IXBCTRL_ISAPRD0 << inputxbar)) >> inputxbar);
}

/**
  * @brief  Select the HXB output source.
  * @rmtoll HXB4_0           ALL        LL_EPWM_SetHXBSource\n
  *         HXB4_1           ALL        LL_EPWM_SetHXBSource\n
  *         HXB5_0           ALL        LL_EPWM_SetHXBSource\n
  *         HXB5_1           ALL        LL_EPWM_SetHXBSource\n
  *         HXB7_0           ALL        LL_EPWM_SetHXBSource\n
  *         HXB7_1           ALL        LL_EPWM_SetHXBSource\n
  *         HXB8_0           ALL        LL_EPWM_SetHXBSource\n
  *         HXB8_1           ALL        LL_EPWM_SetHXBSource\n
  *         HXB9_0           ALL        LL_EPWM_SetHXBSource\n
  *         HXB9_1           ALL        LL_EPWM_SetHXBSource\n
  *         HXB10_0          ALL        LL_EPWM_SetHXBSource\n
  *         HXB10_1          ALL        LL_EPWM_SetHXBSource\n
  *         HXB11_0          ALL        LL_EPWM_SetHXBSource\n
  *         HXB11_1          ALL        LL_EPWM_SetHXBSource\n
  *         HXB12_0          ALL        LL_EPWM_SetHXBSource\n
  *         HXB12_1          ALL        LL_EPWM_SetHXBSource
  * @param  EPWMc EPWMC instance
  * @param  HXBx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MUX_HXB4
  *         @arg @ref LL_EPWM_MUX_HXB5
  *         @arg @ref LL_EPWM_MUX_HXB7
  *         @arg @ref LL_EPWM_MUX_HXB8
  *         @arg @ref LL_EPWM_MUX_HXB9
  *         @arg @ref LL_EPWM_MUX_HXB10
  *         @arg @ref LL_EPWM_MUX_HXB11
  *         @arg @ref LL_EPWM_MUX_HXB12
  * @param  MUXx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_HXB_MUXx(where x can be 0 to 31)
  * @param  MUXSource For specific signal selection, please refer to the manual.
  *         @arg @ref LL_EPWM_HXB_MUX_SEL0
  *         @arg @ref LL_EPWM_HXB_MUX_SEL1
  *         @arg @ref LL_EPWM_HXB_MUX_SEL2
  *         @arg @ref LL_EPWM_HXB_MUX_SEL3
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHXBSource(EPWMC_TypeDef *EPWMc, uint32_t HXBx, uint32_t MUXx, uint32_t MUXSource)
{
  uint8_t isHXBx_1 = (MUXx & 1U);
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->HXB4_0) + OFFSET_TAB_HXBx[HXBx] + isHXBx_1 * 4U));
  MODIFY_REG(*pReg, (EPWM_HXB4_0_MUX0 << (MUXx - isHXBx_1)), (MUXSource << (MUXx - isHXBx_1)));
}

/**
  * @brief  Enable the HXB output source.
  * @rmtoll HXB4_MUX          MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB5_MUX          MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB7_MUX          MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB8_MUX          MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB9_MUX          MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB10_MUX         MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB11_MUX         MUXEN        LL_EPWM_EnableHXBSource\n
  *         HXB12_MUX         MUXEN        LL_EPWM_EnableHXBSource
  * @param  EPWMc EPWMC instance
  * @param  HXBx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MUX_HXB4
  *         @arg @ref LL_EPWM_MUX_HXB5
  *         @arg @ref LL_EPWM_MUX_HXB7
  *         @arg @ref LL_EPWM_MUX_HXB8
  *         @arg @ref LL_EPWM_MUX_HXB9
  *         @arg @ref LL_EPWM_MUX_HXB10
  *         @arg @ref LL_EPWM_MUX_HXB11
  *         @arg @ref LL_EPWM_MUX_HXB12
  * @param  HXBSource For specific signal selection, please refer to the manual.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableHXBSource(EPWMC_TypeDef *EPWMc, uint32_t HXBx, uint32_t HXBSource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->HXB4_MUX) + OFFSET_TAB_HXBxMUX[HXBx]));
  SET_BIT(*pReg, HXBSource);
}

/**
  * @brief  Disable the HXB output source.
  * @rmtoll HXB4_MUX          MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB5_MUX          MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB7_MUX          MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB8_MUX          MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB9_MUX          MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB10_MUX         MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB11_MUX         MUXEN        LL_EPWM_DisableHXBSource\n
  *         HXB12_MUX         MUXEN        LL_EPWM_DisableHXBSource
  * @param  EPWMc EPWMC instance
  * @param  HXBx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MUX_HXB4
  *         @arg @ref LL_EPWM_MUX_HXB5
  *         @arg @ref LL_EPWM_MUX_HXB7
  *         @arg @ref LL_EPWM_MUX_HXB8
  *         @arg @ref LL_EPWM_MUX_HXB9
  *         @arg @ref LL_EPWM_MUX_HXB10
  *         @arg @ref LL_EPWM_MUX_HXB11
  *         @arg @ref LL_EPWM_MUX_HXB12
  * @param  HXBSource For specific signal selection, please refer to the manual.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableHXBSource(EPWMC_TypeDef *EPWMc, uint32_t HXBx, uint32_t HXBSource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->HXB4_MUX) + OFFSET_TAB_HXBxMUX[HXBx]));
  CLEAR_BIT(*pReg, HXBSource);
}

/**
  * @brief  Indicates whether the HXB output source is enabled.
  * @rmtoll HXB4_MUX          MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB5_MUX          MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB7_MUX          MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB8_MUX          MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB9_MUX          MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB10_MUX         MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB11_MUX         MUXEN        LL_EPWM_IsEnabledHXBSource\n
  *         HXB12_MUX         MUXEN        LL_EPWM_IsEnabledHXBSource
  * @param  EPWMc EPWMC instance
  * @param  HXBx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_MUX_HXB4
  *         @arg @ref LL_EPWM_MUX_HXB5
  *         @arg @ref LL_EPWM_MUX_HXB7
  *         @arg @ref LL_EPWM_MUX_HXB8
  *         @arg @ref LL_EPWM_MUX_HXB9
  *         @arg @ref LL_EPWM_MUX_HXB10
  *         @arg @ref LL_EPWM_MUX_HXB11
  *         @arg @ref LL_EPWM_MUX_HXB12
  * @param  HXBSource For specific signal selection, please refer to the manual.
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledHXBSource(EPWMC_TypeDef *EPWMc, uint32_t HXBx, uint32_t HXBSource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->HXB4_MUX) + OFFSET_TAB_HXBxMUX[HXBx]));
  return ((READ_BIT(*pReg, HXBSource) == (HXBSource)) ? 1UL : 0UL);
}

/**
  * @brief  Sets EPWM XBAR output polarity.
  * @rmtoll HXB_POL         HXB4P               LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB5P               LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB7P               LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB9P               LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB10P              LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB11P              LL_EPWM_SetHXBPolarity\n
  *         HXB_POL         HXB12P              LL_EPWM_SetHXBPolarity
  * @param  EPWMc EPWMC instance
  * @param  HXBxP This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_POL_HXB4
  *         @arg @ref LL_EPWM_POL_HXB5
  *         @arg @ref LL_EPWM_POL_HXB7
  *         @arg @ref LL_EPWM_POL_HXB8
  *         @arg @ref LL_EPWM_POL_HXB9
  *         @arg @ref LL_EPWM_POL_HXB10
  *         @arg @ref LL_EPWM_POL_HXB11
  *         @arg @ref LL_EPWM_POL_HXB12
  * @param  polarity This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_HXB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_HXB_POLARITY_ACTIVE_LOW
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetHXBPolarity(EPWMC_TypeDef *EPWMc, uint32_t HXBxP, uint32_t polarity)
{
  MODIFY_REG(EPWMc->HXB_POL, (EPWM_HXB_POL_HXB4P << HXBxP), (polarity << HXBxP));
}

/**
  * @brief  Get EPWM XBAR output polarity.
  * @rmtoll HXB_POL         HXB4P               LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB5P               LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB7P               LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB9P               LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB10P              LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB11P              LL_EPWM_GetHXBPolarity\n
  *         HXB_POL         HXB12P              LL_EPWM_GetHXBPolarity
  * @param  EPWMc EPWMC instance
  * @param  HXBxP This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_POL_HXB4
  *         @arg @ref LL_EPWM_POL_HXB5
  *         @arg @ref LL_EPWM_POL_HXB7
  *         @arg @ref LL_EPWM_POL_HXB8
  *         @arg @ref LL_EPWM_POL_HXB9
  *         @arg @ref LL_EPWM_POL_HXB10
  *         @arg @ref LL_EPWM_POL_HXB11
  *         @arg @ref LL_EPWM_POL_HXB12
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_HXB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_HXB_POLARITY_ACTIVE_LOW
  */
__STATIC_INLINE uint32_t LL_EPWM_GetHXBPolarity(EPWMC_TypeDef *EPWMc, uint32_t HXBxP)
{
  return (uint32_t)((READ_REG(EPWMc->HXB_POL) & (EPWM_HXB_POL_HXB4P << HXBxP)) >> HXBxP);
}

/**
  * @brief  Locks the EPWM HXB
  * @rmtoll HXB_LOCK          HXBLOCK           LL_EPWM_LockHXB\n
  *         HXB_LOCK          KEY               LL_EPWM_LockHXB
  * @param  EPWMc EPWMC instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_LockHXB(EPWMC_TypeDef *EPWMc)
{
  WRITE_REG(EPWMc->HXB_LOCK, (0x5A5A0000UL | EPWM_HXB_LOCK_HXBLOCK));
}

/**
  * @brief  Select the SYNCI input source.
  * @rmtoll SYNCI_SEL1_4          SYNCISEL1        LL_EPWM_SetSYNCISource\n
  *         SYNCI_SEL1_4          SYNCISEL2        LL_EPWM_SetSYNCISource\n
  *         SYNCI_SEL1_4          SYNCISEL3        LL_EPWM_SetSYNCISource\n
  *         SYNCI_SEL1_4          SYNCISEL4        LL_EPWM_SetSYNCISource\n
  *         SYNCI_SEL5_6          SYNCISEL5        LL_EPWM_SetSYNCISource\n
  *         SYNCI_SEL5_6          SYNCISEL6        LL_EPWM_SetSYNCISource
  * @param  EPWMc EPWMC instance
  * @param  SYNCISELx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SYNC_SEL1
  *         @arg @ref LL_EPWM_SYNC_SEL2
  *         @arg @ref LL_EPWM_SYNC_SEL3
  *         @arg @ref LL_EPWM_SYNC_SEL4
  *         @arg @ref LL_EPWM_SYNC_SEL5
  *         @arg @ref LL_EPWM_SYNC_SEL6
  * @param  SYNCISource For specific signal selection, please refer to the manual.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSYNCISource(EPWMC_TypeDef *EPWMc, uint32_t SYNCISELx, uint32_t SYNCISource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->SYNCI_SEL1_4) + OFFSET_TAB_SYNCSEL[SYNCISELx]));
  MODIFY_REG(*pReg, (EPWM_SYNCI_SEL1_4_SYNCISEL1 << OFFSET_TAB_SYNCSELx[SYNCISELx]), (SYNCISource << OFFSET_TAB_SYNCSELx[SYNCISELx]));
}

/**
  * @brief  Select the SYNCO output source.
  * @rmtoll SYNCO_SEL1_4          SYNCOSEL1        LL_EPWM_SetSYNCOSource\n
  *         SYNCO_SEL1_4          SYNCOSEL2        LL_EPWM_SetSYNCOSource\n
  *         SYNCO_SEL1_4          SYNCOSEL3        LL_EPWM_SetSYNCOSource\n
  *         SYNCO_SEL1_4          SYNCOSEL4        LL_EPWM_SetSYNCOSource\n
  *         SYNCO_SEL5_6          SYNCOSEL5        LL_EPWM_SetSYNCOSource\n
  *         SYNCO_SEL5_6          SYNCOSEL6        LL_EPWM_SetSYNCOSource
  * @param  EPWMc EPWMC instance
  * @param  SYNCOSELx This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SYNC_SEL1
  *         @arg @ref LL_EPWM_SYNC_SEL2
  *         @arg @ref LL_EPWM_SYNC_SEL3
  *         @arg @ref LL_EPWM_SYNC_SEL4
  *         @arg @ref LL_EPWM_SYNC_SEL5
  *         @arg @ref LL_EPWM_SYNC_SEL6
  * @param  SYNCOSource For specific signal selection, please refer to the manual.
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSYNCOSource(EPWMC_TypeDef *EPWMc, uint32_t SYNCOSELx, uint32_t SYNCOSource)
{
  register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&EPWMc->SYNCO_SEL1_4) + OFFSET_TAB_SYNCSEL[SYNCOSELx]));
  MODIFY_REG(*pReg, (EPWM_SYNCO_SEL1_4_SYNCOSEL1 << OFFSET_TAB_SYNCSELx[SYNCOSELx]), (SYNCOSource << OFFSET_TAB_SYNCSELx[SYNCOSELx]));
}

/**
  * @brief  Enable EPWM output SOCxA to ADCSOCAO
  * @rmtoll ADCOUT          SOC1A_EN           LL_EPWM_EnableSOCxA\n
  *         ADCOUT          SOC2A_EN           LL_EPWM_EnableSOCxA\n
  *         ADCOUT          SOC3A_EN           LL_EPWM_EnableSOCxA\n
  *         ADCOUT          SOC4A_EN           LL_EPWM_EnableSOCxA\n
  *         ADCOUT          SOC5A_EN           LL_EPWM_EnableSOCxA\n
  *         ADCOUT          SOC6A_EN           LL_EPWM_EnableSOCxA
  * @param  EPWMc EPWMC instance
  * @param SOCxAEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1A
  *         @arg @ref LL_EPWM_EN_SOC2A
  *         @arg @ref LL_EPWM_EN_SOC3A
  *         @arg @ref LL_EPWM_EN_SOC4A
  *         @arg @ref LL_EPWM_EN_SOC5A
  *         @arg @ref LL_EPWM_EN_SOC6A
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableSOCxA(EPWMC_TypeDef *EPWMc, uint32_t SOCxAEN)
{
  SET_BIT(EPWMc->ADCOUT, SOCxAEN);
}

/**
  * @brief  Disable EPWM output SOCxA to ADCSOCAO
  * @rmtoll ADCOUT          SOC1A_EN           LL_EPWM_DisableSOCxA\n
  *         ADCOUT          SOC2A_EN           LL_EPWM_DisableSOCxA\n
  *         ADCOUT          SOC3A_EN           LL_EPWM_DisableSOCxA\n
  *         ADCOUT          SOC4A_EN           LL_EPWM_DisableSOCxA\n
  *         ADCOUT          SOC5A_EN           LL_EPWM_DisableSOCxA\n
  *         ADCOUT          SOC6A_EN           LL_EPWM_DisableSOCxA
  * @param  EPWMc EPWMC instance
  * @param SOCxAEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1A
  *         @arg @ref LL_EPWM_EN_SOC2A
  *         @arg @ref LL_EPWM_EN_SOC3A
  *         @arg @ref LL_EPWM_EN_SOC4A
  *         @arg @ref LL_EPWM_EN_SOC5A
  *         @arg @ref LL_EPWM_EN_SOC6A
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableSOCxA(EPWMC_TypeDef *EPWMc, uint32_t SOCxAEN)
{
  CLEAR_BIT(EPWMc->ADCOUT, SOCxAEN);
}

/**
  * @brief  Indicates whether EPWM output SOCxA to ADCSOCAO
  * @rmtoll ADCOUT          SOC1A_EN           LL_EPWM_IsEnabledSOCxA\n
  *         ADCOUT          SOC2A_EN           LL_EPWM_IsEnabledSOCxA\n
  *         ADCOUT          SOC3A_EN           LL_EPWM_IsEnabledSOCxA\n
  *         ADCOUT          SOC4A_EN           LL_EPWM_IsEnabledSOCxA\n
  *         ADCOUT          SOC5A_EN           LL_EPWM_IsEnabledSOCxA\n
  *         ADCOUT          SOC6A_EN           LL_EPWM_IsEnabledSOCxA
  * @param  EPWMc EPWMC instance
  * @param SOCxAEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1A
  *         @arg @ref LL_EPWM_EN_SOC2A
  *         @arg @ref LL_EPWM_EN_SOC3A
  *         @arg @ref LL_EPWM_EN_SOC4A
  *         @arg @ref LL_EPWM_EN_SOC5A
  *         @arg @ref LL_EPWM_EN_SOC6A
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledSOCxA(EPWMC_TypeDef *EPWMc, uint32_t SOCxAEN)
{
  return ((READ_BIT(EPWMc->ADCOUT, SOCxAEN) == (SOCxAEN)) ? 1UL : 0UL);
}

/**
  * @brief  Enable EPWM output SOCxB to ADCSOCBO
  * @rmtoll ADCOUT          SOC1B_EN           LL_EPWM_EnableSOCxB\n
  *         ADCOUT          SOC2B_EN           LL_EPWM_EnableSOCxB\n
  *         ADCOUT          SOC3B_EN           LL_EPWM_EnableSOCxB\n
  *         ADCOUT          SOC4B_EN           LL_EPWM_EnableSOCxB\n
  *         ADCOUT          SOC5B_EN           LL_EPWM_EnableSOCxB\n
  *         ADCOUT          SOC6B_EN           LL_EPWM_EnableSOCxB
  * @param  EPWMc EPWMC instance
  * @param SOCxBEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1B
  *         @arg @ref LL_EPWM_EN_SOC2B
  *         @arg @ref LL_EPWM_EN_SOC3B
  *         @arg @ref LL_EPWM_EN_SOC4B
  *         @arg @ref LL_EPWM_EN_SOC5B
  *         @arg @ref LL_EPWM_EN_SOC6B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableSOCxB(EPWMC_TypeDef *EPWMc, uint32_t SOCxBEN)
{
  SET_BIT(EPWMc->ADCOUT, SOCxBEN);
}

/**
  * @brief  Disable EPWM output SOCxB to ADCSOCBO
  * @rmtoll ADCOUT          SOC1B_EN           LL_EPWM_DisableSOCxB\n
  *         ADCOUT          SOC2B_EN           LL_EPWM_DisableSOCxB\n
  *         ADCOUT          SOC3B_EN           LL_EPWM_DisableSOCxB\n
  *         ADCOUT          SOC4B_EN           LL_EPWM_DisableSOCxB\n
  *         ADCOUT          SOC5B_EN           LL_EPWM_DisableSOCxB\n
  *         ADCOUT          SOC6B_EN           LL_EPWM_DisableSOCxB
  * @param  EPWMc EPWMC instance
  * @param SOCxBEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1B
  *         @arg @ref LL_EPWM_EN_SOC2B
  *         @arg @ref LL_EPWM_EN_SOC3B
  *         @arg @ref LL_EPWM_EN_SOC4B
  *         @arg @ref LL_EPWM_EN_SOC5B
  *         @arg @ref LL_EPWM_EN_SOC6B
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableSOCxB(EPWMC_TypeDef *EPWMc, uint32_t SOCxBEN)
{
  CLEAR_BIT(EPWMc->ADCOUT, SOCxBEN);
}

/**
  * @brief  Indicates whether EPWM output SOCxB to ADCSOCBO
  * @rmtoll ADCOUT          SOC1B_EN           LL_EPWM_IsEnabledSOCxB\n
  *         ADCOUT          SOC2B_EN           LL_EPWM_IsEnabledSOCxB\n
  *         ADCOUT          SOC3B_EN           LL_EPWM_IsEnabledSOCxB\n
  *         ADCOUT          SOC4B_EN           LL_EPWM_IsEnabledSOCxB\n
  *         ADCOUT          SOC5B_EN           LL_EPWM_IsEnabledSOCxB\n
  *         ADCOUT          SOC6B_EN           LL_EPWM_IsEnabledSOCxB
  * @param  EPWMc EPWMC instance
  * @param SOCxBEN This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_EN_SOC1B
  *         @arg @ref LL_EPWM_EN_SOC2B
  *         @arg @ref LL_EPWM_EN_SOC3B
  *         @arg @ref LL_EPWM_EN_SOC4B
  *         @arg @ref LL_EPWM_EN_SOC5B
  *         @arg @ref LL_EPWM_EN_SOC6B
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledSOCxB(EPWMC_TypeDef *EPWMc, uint32_t SOCxBEN)
{
  return ((READ_BIT(EPWMc->ADCOUT, SOCxBEN) == (SOCxBEN)) ? 1UL : 0UL);
}

/**
  * @brief  Sets ADCSOCAO output polarity.
  * @rmtoll ADCOUT         SOCA_POL              LL_EPWM_SetSOCAPolarity
  * @param  EPWMc EPWMC instance
  * @param  polarity This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOCA_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_SOCA_POLARITY_ACTIVE_LOW
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSOCAPolarity(EPWMC_TypeDef *EPWMc, uint32_t polarity)
{
  MODIFY_REG(EPWMc->ADCOUT, EPWM_ADCOUT_SOCA_POL, polarity);
}

/**
  * @brief  Get ADCSOCAO output polarity.
  * @rmtoll ADCOUT         SOCA_POL              LL_EPWM_GetSOCAPolarity
  * @param  EPWMc EPWMC instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_SOCA_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_SOCA_POLARITY_ACTIVE_LOW
  */
__STATIC_INLINE uint32_t LL_EPWM_GetSOCAPolarity(EPWMC_TypeDef *EPWMc)
{
  return (uint32_t)(READ_REG(EPWMc->ADCOUT) & EPWM_ADCOUT_SOCA_POL);
}

/**
  * @brief  Sets ADCSOCBO output polarity.
  * @rmtoll ADCOUT         SOCB_POL              LL_EPWM_SetSOCBPolarity
  * @param  EPWMc EPWMC instance
  * @param  polarity This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SOCB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_SOCB_POLARITY_ACTIVE_LOW
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSOCBPolarity(EPWMC_TypeDef *EPWMc, uint32_t polarity)
{
  MODIFY_REG(EPWMc->ADCOUT, EPWM_ADCOUT_SOCB_POL, polarity);
}

/**
  * @brief  Get ADCSOCBO output polarity.
  * @rmtoll ADCOUT         SOCB_POL              LL_EPWM_GetSOCBPolarity
  * @param  EPWMc EPWMC instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_SOCB_POLARITY_ACTIVE_HIGH
  *         @arg @ref LL_EPWM_SOCB_POLARITY_ACTIVE_LOW
  */
__STATIC_INLINE uint32_t LL_EPWM_GetSOCBPolarity(EPWMC_TypeDef *EPWMc)
{
  return (uint32_t)(READ_REG(EPWMc->ADCOUT) & EPWM_ADCOUT_SOCB_POL);
}

/**
  * @brief  Enable Pulse Stretching Module Bypass.
  * @rmtoll SCOUT_CFG         SCOUT_EXP_BYPASS           LL_EPWM_EnableScoutEXPBypass
  * @param  EPWMc EPWMC instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableScoutEXPBypass(EPWMC_TypeDef *EPWMc)
{
  SET_BIT(EPWMc->SCOUT_CFG, EPWM_SCOUT_CFG_SCOUT_EXP_BYPASS);
}

/**
  * @brief  Disable Pulse Stretching Module Bypass.
  * @rmtoll SCOUT_CFG         SCOUT_EXP_BYPASS           LL_EPWM_DisableScoutEXPBypass
  * @param  EPWMc EPWMC instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableScoutEXPBypass(EPWMC_TypeDef *EPWMc)
{
  CLEAR_BIT(EPWMc->SCOUT_CFG, EPWM_SCOUT_CFG_SCOUT_EXP_BYPASS);
}

/**
  * @brief  Indicates whether Pulse Stretching Module Bypass is enabled.
  * @rmtoll SCOUT_CFG         SCOUT_EXP_BYPASS           LL_EPWM_IsEnabledScoutEXPBypass
  * @param  EPWMc EPWMC instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledScoutEXPBypass(EPWMC_TypeDef *EPWMc)
{
  return ((READ_BIT(EPWMc->SCOUT_CFG, EPWM_SCOUT_CFG_SCOUT_EXP_BYPASS) == (EPWM_SCOUT_CFG_SCOUT_EXP_BYPASS)) ? 1UL : 0UL);
}

/**
  * @brief  Set SCOUT output select
  * @rmtoll SCOUT_CFG          SCOUT_SEL           LL_EPWM_SetSCOUT
  * @param  EPWMc EPWMC instance
  * @param  Output This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_SCOUT_EPWM1_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM2_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM3_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM4_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM5_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM6_SYNCO
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_SetSCOUT(EPWMC_TypeDef *EPWMc, uint32_t Output)
{
  MODIFY_REG(EPWMc->SCOUT_CFG, EPWM_SCOUT_CFG_SCOUT_SEL, Output);
}

/**
  * @brief  Get SCOUT output select
  * @rmtoll SCOUT_CFG          SCOUT_SEL           LL_EPWM_GetSCOUT
  * @param  EPWMc EPWMC instance
  * @retval Returned value can be one of the following values:
  *         @arg @ref LL_EPWM_SCOUT_EPWM1_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM2_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM3_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM4_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM5_SYNCO
  *         @arg @ref LL_EPWM_SCOUT_EPWM6_SYNCO
  */
__STATIC_INLINE uint32_t LL_EPWM_GetSCOUT(EPWMC_TypeDef *EPWMc)
{
  return (uint32_t)(READ_REG(EPWMc->SCOUT_CFG) & EPWM_SCOUT_CFG_SCOUT_SEL);
}

/**
  * @brief  Indicate whether ADCOUT register is locked (ADCSOCLOCK).
  * @rmtoll SYNCSOCLOCK           ADCSOCLOCK           LL_EPWM_IsActiveFlag_ADCSOCLOCK
  * @param  EPWMc EPWMC instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_ADCSOCLOCK(EPWMC_TypeDef *EPWMc)
{
  return ((READ_BIT(EPWMc->SYNCSOCLOCK, EPWM_SYNCSOCLOCK_ADCSOCLOCK) == (EPWM_SYNCSOCLOCK_ADCSOCLOCK)) ? 1UL : 0UL);
}

/**
  * @brief  Indicate whether SYNCI_SEL1_4,SYNCI_SEL5_6 register is locked (SYNCILOCK).
  * @rmtoll SYNCSOCLOCK           SYNCILOCK           LL_EPWM_IsActiveFlag_SYNCILOCK
  * @param  EPWMc EPWMC instance
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsActiveFlag_SYNCILOCK(EPWMC_TypeDef *EPWMc)
{
  return ((READ_BIT(EPWMc->SYNCSOCLOCK, EPWM_SYNCSOCLOCK_SYNCILOCK) == (EPWM_SYNCSOCLOCK_SYNCILOCK)) ? 1UL : 0UL);
}

/**
  * @brief  Unlocks all EPWM common register and part of EPWMx register.
  * @rmtoll EALLOW          EALLOW           LL_EPWM_EALLOW\n
  *         EALLOW          KEY              LL_EPWM_EALLOW
  * @param  EPWMc EPWMC instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EALLOW(EPWMC_TypeDef *EPWMc)
{
  WRITE_REG(EPWMc->EALLOW, (0x5A5A0000UL | EPWM_EALLOW_EALLOW));
}

/**
  * @brief  Locks all EPWM common register and part of EPWMx register.
  * @rmtoll EALLOW          EALLOW           LL_EPWM_EALLOW\n
  *         EALLOW          KEY              LL_EPWM_EALLOW
  * @param  EPWMc EPWMC instance
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EDIS(EPWMC_TypeDef *EPWMc)
{
  WRITE_REG(EPWMc->EALLOW, (0x5A5A0000UL));
}

/**
  * @brief  Enable EPWMx CLOCK
  * @rmtoll CLKEN          EPWM1_CLK_EN           LL_EPWM_EnableEPWMxCLK\n
  *         CLKEN          EPWM2_CLK_EN           LL_EPWM_EnableEPWMxCLK\n
  *         CLKEN          EPWM3_CLK_EN           LL_EPWM_EnableEPWMxCLK\n
  *         CLKEN          EPWM4_CLK_EN           LL_EPWM_EnableEPWMxCLK\n
  *         CLKEN          EPWM5_CLK_EN           LL_EPWM_EnableEPWMxCLK\n
  *         CLKEN          EPWM6_CLK_EN           LL_EPWM_EnableEPWMxCLK
  * @param  EPWMc EPWMC instance
  * @param EPWMxCLK This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CLK_EPWM1
  *         @arg @ref LL_EPWM_CLK_EPWM2
  *         @arg @ref LL_EPWM_CLK_EPWM3
  *         @arg @ref LL_EPWM_CLK_EPWM4
  *         @arg @ref LL_EPWM_CLK_EPWM5
  *         @arg @ref LL_EPWM_CLK_EPWM6
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_EnableEPWMxCLK(EPWMC_TypeDef *EPWMc, uint32_t EPWMxCLK)
{
  SET_BIT(EPWMc->CLKEN, EPWMxCLK);
}

/**
  * @brief  Disable EPWMx CLOCK
  * @rmtoll CLKEN          EPWM1_CLK_EN           LL_EPWM_DisableEPWMxCLK\n
  *         CLKEN          EPWM2_CLK_EN           LL_EPWM_DisableEPWMxCLK\n
  *         CLKEN          EPWM3_CLK_EN           LL_EPWM_DisableEPWMxCLK\n
  *         CLKEN          EPWM4_CLK_EN           LL_EPWM_DisableEPWMxCLK\n
  *         CLKEN          EPWM5_CLK_EN           LL_EPWM_DisableEPWMxCLK\n
  *         CLKEN          EPWM6_CLK_EN           LL_EPWM_DisableEPWMxCLK
  * @param  EPWMc EPWMC instance
  * @param EPWMxCLK This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CLK_EPWM1
  *         @arg @ref LL_EPWM_CLK_EPWM2
  *         @arg @ref LL_EPWM_CLK_EPWM3
  *         @arg @ref LL_EPWM_CLK_EPWM4
  *         @arg @ref LL_EPWM_CLK_EPWM5
  *         @arg @ref LL_EPWM_CLK_EPWM6
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_DisableEPWMxCLK(EPWMC_TypeDef *EPWMc, uint32_t EPWMxCLK)
{
  CLEAR_BIT(EPWMc->CLKEN, EPWMxCLK);
}

/**
  * @brief  Indicates whether EPWMx CLOCK is enabled.
  * @rmtoll CLKEN          EPWM1_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK\n
  *         CLKEN          EPWM2_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK\n
  *         CLKEN          EPWM3_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK\n
  *         CLKEN          EPWM4_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK\n
  *         CLKEN          EPWM5_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK\n
  *         CLKEN          EPWM6_CLK_EN           LL_EPWM_IsEnabledEPWMxCLK
  * @param  EPWMc EPWMC instance
  * @param EPWMxCLK This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_CLK_EPWM1
  *         @arg @ref LL_EPWM_CLK_EPWM2
  *         @arg @ref LL_EPWM_CLK_EPWM3
  *         @arg @ref LL_EPWM_CLK_EPWM4
  *         @arg @ref LL_EPWM_CLK_EPWM5
  *         @arg @ref LL_EPWM_CLK_EPWM6
  * @retval State of bit (1 or 0).
  */
__STATIC_INLINE uint32_t LL_EPWM_IsEnabledEPWMxCLK(EPWMC_TypeDef *EPWMc, uint32_t EPWMxCLK)
{
  return ((READ_BIT(EPWMc->CLKEN, EPWMxCLK) == (EPWMxCLK)) ? 1UL : 0UL);
}

/**
  * @brief  Gets the XBAR Zone status flag1
  * @rmtoll XBARFLG1           ALL           LL_EPWM_GetXBARFlag1Status
  * @param  EPWMc EPWMC instance
  * @retval The function returns the following or the bitwise OR value
  *         of the following values.
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP1_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP2_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP3_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP4_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT4
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT5
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT6
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT7
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT8
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT9
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT10
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT11
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT12
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT13
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT14
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADCSOCA
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADCSOCB
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH5
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH6
  */
__STATIC_INLINE uint32_t LL_EPWM_GetXBARFlag1Status(EPWMC_TypeDef *EPWMc)
{
  return (uint32_t)(READ_REG(EPWMc->XBARFLG1));
}

/**
  * @brief  Clear the XBAR Zone flag1
  * @rmtoll XBARCLR1           ALL           LL_EPWM_ClearXBARFlag1
  * @param  EPWMc EPWMC instance
  * @param XBARFlags This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP1_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP2_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP3_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_COMP4_OUT
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT4
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT5
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT6
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT7
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT8
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT9
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT10
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT11
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT12
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT13
  *         @arg @ref LL_EPWM_XBAR_FLAG1_INPUT14
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADCSOCA
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADCSOCB
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC1_AWD3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_ADC2_AWD3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH5
  *         @arg @ref LL_EPWM_XBAR_FLAG1_TIM1_CH6
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearXBARFlag1(EPWMC_TypeDef *EPWMc, uint32_t XBARFlags)
{
  SET_BIT(EPWMc->XBARCLR1, XBARFlags);
}

/**
  * @brief  Gets the XBAR Zone status flag2
  * @rmtoll XBARFLG2           ALL           LL_EPWM_GetXBARFlag2Status
  * @param  EPWMc EPWMC instance
  * @retval The function returns the following or the bitwise OR value
  *         of the following values.
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH5
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH6
  *         @arg @ref LL_EPWM_XBAR_FLAG2_EPWM_SCOUT
  *         @arg @ref LL_EPWM_XBAR_FLAG2_CPUHALT
  */
__STATIC_INLINE uint32_t LL_EPWM_GetXBARFlag2Status(EPWMC_TypeDef *EPWMc)
{
  return (uint32_t)(READ_REG(EPWMc->XBARFLG2));
}

/**
  * @brief  Clear the XBAR Zone flag2
  * @rmtoll XBARCLR2           ALL           LL_EPWM_ClearXBARFlag2
  * @param  EPWMc EPWMC instance
  * @param XBARFlags This parameter can be one of the following values:
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM2_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM3_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH1
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH2
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH3
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH4
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH5
  *         @arg @ref LL_EPWM_XBAR_FLAG2_TIM8_CH6
  *         @arg @ref LL_EPWM_XBAR_FLAG2_EPWM_SCOUT
  *         @arg @ref LL_EPWM_XBAR_FLAG2_CPUHALT
  * @retval None
  */
__STATIC_INLINE void LL_EPWM_ClearXBARFlag2(EPWMC_TypeDef *EPWMc, uint32_t XBARFlags)
{
  SET_BIT(EPWMc->XBARCLR2, XBARFlags);
}

/**
  * @}
  */
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup EPWM_LL_EF_Init Initialisation and deinitialisation functions
  * @{
  */

/**
  * @}
  */
#endif /* USE_FULL_LL_DRIVER */

/**
  * @}
  */

/**
  * @}
  */

#endif /* EPWM1 || EPWM2 || EPWM3 || EPWM4 || EPWM5 || EPWM6 */

/**
  * @}
  */

#ifdef __cplusplus
}
#endif

#endif /* __PY32F420_LL_EPWM_H */
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
